Search

Shaka Shakar White

Examiner (ID: 4923)

Most Active Art Unit
2823
Art Unit(s)
2826, 2829, 2809, 2823
Total Applications
474
Issued Applications
353
Pending Applications
0
Abandoned Applications
121

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8159465 [patent_doc_number] => 20120100716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'Method to improve reliability (EM and TDDB) with post silylation plasma treatment process for copper damascene structures' [patent_app_type] => utility [patent_app_number] => 12/925374 [patent_app_country] => US [patent_app_date] => 2010-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3178 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20120100716.pdf [firstpage_image] =>[orig_patent_app_number] => 12925374 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/925374
Method to improve reliability (EM and TDDB) with post silylation plasma treatment process for copper damascene structures Oct 19, 2010 Abandoned
Array ( [id] => 8133931 [patent_doc_number] => 20120091504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'METHOD OF FORMING AN ESD PROTECTION DEVICE AND STRUCTURE THEREFOR' [patent_app_type] => utility [patent_app_number] => 12/907633 [patent_app_country] => US [patent_app_date] => 2010-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8262 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20120091504.pdf [firstpage_image] =>[orig_patent_app_number] => 12907633 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/907633
Method of forming an ESD protection device and structure therefor Oct 18, 2010 Issued
Array ( [id] => 8897112 [patent_doc_number] => 08476634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-02 [patent_title] => 'Display device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/907537 [patent_app_country] => US [patent_app_date] => 2010-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 9964 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12907537 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/907537
Display device and method of manufacturing the same Oct 18, 2010 Issued
Array ( [id] => 6153374 [patent_doc_number] => 20110156099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'ENHANCED CONFINEMENT OF SENSITIVE MATERIALS OF A HIGH-K METAL GATE ELECTRODE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/907596 [patent_app_country] => US [patent_app_date] => 2010-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20110156099.pdf [firstpage_image] =>[orig_patent_app_number] => 12907596 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/907596
Enhanced confinement of sensitive materials of a high-K metal gate electrode structure Oct 18, 2010 Issued
Array ( [id] => 6177583 [patent_doc_number] => 20110121351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'Organic light emitting diode device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/923980 [patent_app_country] => US [patent_app_date] => 2010-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3139 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20110121351.pdf [firstpage_image] =>[orig_patent_app_number] => 12923980 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923980
Organic light emitting diode device and method of manufacturing the same Oct 18, 2010 Issued
Array ( [id] => 5980269 [patent_doc_number] => 20110095401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/906217 [patent_app_country] => US [patent_app_date] => 2010-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 13050 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20110095401.pdf [firstpage_image] =>[orig_patent_app_number] => 12906217 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/906217
Method for manufacturing semiconductor device and semiconductor device Oct 17, 2010 Issued
Array ( [id] => 6161904 [patent_doc_number] => 20110159660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'Methods of Forming Integrated Circuit Capacitors Having Sidewall Supports and Capacitors Formed Thereby' [patent_app_type] => utility [patent_app_number] => 12/906184 [patent_app_country] => US [patent_app_date] => 2010-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 13635 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20110159660.pdf [firstpage_image] =>[orig_patent_app_number] => 12906184 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/906184
Methods of forming integrated circuit capacitors having sidewall supports and capacitors formed thereby Oct 17, 2010 Issued
Array ( [id] => 6036457 [patent_doc_number] => 20110089514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'COLOR-OPTIMIZED IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 12/906351 [patent_app_country] => US [patent_app_date] => 2010-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7126 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20110089514.pdf [firstpage_image] =>[orig_patent_app_number] => 12906351 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/906351
Color-optimized image sensor Oct 17, 2010 Issued
Array ( [id] => 8446138 [patent_doc_number] => 08288189 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Package structure having MEMS element and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 12/906401 [patent_app_country] => US [patent_app_date] => 2010-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3103 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12906401 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/906401
Package structure having MEMS element and fabrication method thereof Oct 17, 2010 Issued
Array ( [id] => 8846833 [patent_doc_number] => 08456020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Semiconductor package and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/906377 [patent_app_country] => US [patent_app_date] => 2010-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 7023 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12906377 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/906377
Semiconductor package and method of manufacturing the same Oct 17, 2010 Issued
Array ( [id] => 8139729 [patent_doc_number] => 20120094418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'Wafer Level Package and Manufacturing Method Using Photodefinable Polymer for Enclosing Acoustic Devices' [patent_app_type] => utility [patent_app_number] => 12/906689 [patent_app_country] => US [patent_app_date] => 2010-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2480 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20120094418.pdf [firstpage_image] =>[orig_patent_app_number] => 12906689 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/906689
Wafer Level Package and Manufacturing Method Using Photodefinable Polymer for Enclosing Acoustic Devices Oct 17, 2010 Abandoned
Array ( [id] => 5996928 [patent_doc_number] => 20110115078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'FLIP CHIP PACKAGE' [patent_app_type] => utility [patent_app_number] => 12/906348 [patent_app_country] => US [patent_app_date] => 2010-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4718 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20110115078.pdf [firstpage_image] =>[orig_patent_app_number] => 12906348 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/906348
FLIP CHIP PACKAGE Oct 17, 2010 Abandoned
Array ( [id] => 8294351 [patent_doc_number] => 08222136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-17 [patent_title] => 'Method of forming contacts for a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/906868 [patent_app_country] => US [patent_app_date] => 2010-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4524 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12906868 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/906868
Method of forming contacts for a semiconductor device Oct 17, 2010 Issued
Array ( [id] => 6137410 [patent_doc_number] => 20110127614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'REDUCING THE SERIES RESISTANCE IN SOPHISTICATED TRANSISTORS BY EMBEDDING METAL SILICIDE CONTACT REGIONS RELIABLY INTO HIGHLY DOPED SEMICONDUCTOR MATERIAL' [patent_app_type] => utility [patent_app_number] => 12/905545 [patent_app_country] => US [patent_app_date] => 2010-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8315 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20110127614.pdf [firstpage_image] =>[orig_patent_app_number] => 12905545 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/905545
REDUCING THE SERIES RESISTANCE IN SOPHISTICATED TRANSISTORS BY EMBEDDING METAL SILICIDE CONTACT REGIONS RELIABLY INTO HIGHLY DOPED SEMICONDUCTOR MATERIAL Oct 14, 2010 Abandoned
Array ( [id] => 6137420 [patent_doc_number] => 20110127616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'WORK FUNCTION ADJUSTMENT IN HIGH-K GATE STACKS FOR DEVICES OF DIFFERENT THRESHOLD VOLTAGE' [patent_app_type] => utility [patent_app_number] => 12/905501 [patent_app_country] => US [patent_app_date] => 2010-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10662 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20110127616.pdf [firstpage_image] =>[orig_patent_app_number] => 12905501 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/905501
Work function adjustment in high-k gate stacks for devices of different threshold voltage Oct 14, 2010 Issued
Array ( [id] => 8133941 [patent_doc_number] => 20120091519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'METHOD AND APPARATUS FOR IMPROVING CAPACITOR CAPACITANCE AND COMPATIBILITY' [patent_app_type] => utility [patent_app_number] => 12/905523 [patent_app_country] => US [patent_app_date] => 2010-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7400 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20120091519.pdf [firstpage_image] =>[orig_patent_app_number] => 12905523 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/905523
Method and apparatus for improving capacitor capacitance and compatibility Oct 14, 2010 Issued
Array ( [id] => 8772964 [patent_doc_number] => 08426922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'CMOS structure and latch-up preventing method of same' [patent_app_type] => utility [patent_app_number] => 12/905837 [patent_app_country] => US [patent_app_date] => 2010-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1715 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12905837 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/905837
CMOS structure and latch-up preventing method of same Oct 14, 2010 Issued
Array ( [id] => 8133727 [patent_doc_number] => 20120091413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'Three Dimensional Horizontal Diode Non-Volatile Memory Array and Method of Making Thereof' [patent_app_type] => utility [patent_app_number] => 12/905445 [patent_app_country] => US [patent_app_date] => 2010-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6411 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20120091413.pdf [firstpage_image] =>[orig_patent_app_number] => 12905445 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/905445
Three dimensional horizontal diode non-volatile memory array and method of making thereof Oct 14, 2010 Issued
Array ( [id] => 6038974 [patent_doc_number] => 20110092023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'PACKAGE STRUCTURE OF PHOTODIODE AND FORMING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/905002 [patent_app_country] => US [patent_app_date] => 2010-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3726 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0092/20110092023.pdf [firstpage_image] =>[orig_patent_app_number] => 12905002 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/905002
Package structure of photodiode and forming method thereof Oct 13, 2010 Issued
Array ( [id] => 7535082 [patent_doc_number] => 08048706 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-11-01 [patent_title] => 'Ablative scribing of solar cell structures' [patent_app_type] => utility [patent_app_number] => 12/904922 [patent_app_country] => US [patent_app_date] => 2010-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5275 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/048/08048706.pdf [firstpage_image] =>[orig_patent_app_number] => 12904922 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/904922
Ablative scribing of solar cell structures Oct 13, 2010 Issued
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