Search

Shan Liu

Examiner (ID: 10838, Phone: (571)270-0383 , Office: P/2871 )

Most Active Art Unit
2871
Art Unit(s)
2871
Total Applications
659
Issued Applications
442
Pending Applications
78
Abandoned Applications
170

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17675061 [patent_doc_number] => 20220188228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => CACHE EVICTIONS MANAGEMENT IN A TWO LEVEL MEMORY CONTROLLER MODE [patent_app_type] => utility [patent_app_number] => 17/559870 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8225 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17559870 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/559870
CACHE EVICTIONS MANAGEMENT IN A TWO LEVEL MEMORY CONTROLLER MODE Dec 21, 2021 Pending
Array ( [id] => 17535490 [patent_doc_number] => 20220114099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => SYSTEM, APPARATUS AND METHODS FOR DIRECT DATA READS FROM MEMORY [patent_app_type] => utility [patent_app_number] => 17/645485 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645485 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/645485
System, apparatus and methods for direct data reads from memory Dec 21, 2021 Issued
Array ( [id] => 17535490 [patent_doc_number] => 20220114099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => SYSTEM, APPARATUS AND METHODS FOR DIRECT DATA READS FROM MEMORY [patent_app_type] => utility [patent_app_number] => 17/645485 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645485 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/645485
System, apparatus and methods for direct data reads from memory Dec 21, 2021 Issued
Array ( [id] => 18454360 [patent_doc_number] => 20230195640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => Cache Associativity Allocation [patent_app_type] => utility [patent_app_number] => 17/557731 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10683 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557731 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/557731
Cache Associativity Allocation Dec 20, 2021 Abandoned
Array ( [id] => 18154684 [patent_doc_number] => 11567662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Storage system interface [patent_app_type] => utility [patent_app_number] => 17/549031 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10150 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549031 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/549031
Storage system interface Dec 12, 2021 Issued
Array ( [id] => 18234909 [patent_doc_number] => 11599468 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-03-07 [patent_title] => Marshalled data coherency [patent_app_type] => utility [patent_app_number] => 17/538365 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 15783 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17538365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/538365
Marshalled data coherency Nov 29, 2021 Issued
Array ( [id] => 17676360 [patent_doc_number] => 20220189527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => MEMORY SYSTEM AND MEMORY MODULE INCLUDING MEMORY CHIPS SHARING CHANNEL [patent_app_type] => utility [patent_app_number] => 17/527628 [patent_app_country] => US [patent_app_date] => 2021-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8189 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17527628 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/527628
Memory system and memory module including memory chips sharing channel Nov 15, 2021 Issued
Array ( [id] => 18189226 [patent_doc_number] => 11579811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Method and apparatus for storage device latency/bandwidth self monitoring [patent_app_type] => utility [patent_app_number] => 17/527143 [patent_app_country] => US [patent_app_date] => 2021-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 11790 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17527143 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/527143
Method and apparatus for storage device latency/bandwidth self monitoring Nov 14, 2021 Issued
Array ( [id] => 17597880 [patent_doc_number] => 20220147454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => ONBOARD RELAY DEVICE, ONBOARD RELAY METHOD, AND NON-TRANSITORY RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 17/525556 [patent_app_country] => US [patent_app_date] => 2021-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13272 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17525556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/525556
Onboard relay device, onboard relay method, and non-transitory recording medium Nov 11, 2021 Issued
Array ( [id] => 18154894 [patent_doc_number] => 11567874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Prefetch management in a hierarchical cache system [patent_app_type] => utility [patent_app_number] => 17/520805 [patent_app_country] => US [patent_app_date] => 2021-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4913 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17520805 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/520805
Prefetch management in a hierarchical cache system Nov 7, 2021 Issued
Array ( [id] => 18400982 [patent_doc_number] => 11663120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Controlling NAND operation latency [patent_app_type] => utility [patent_app_number] => 17/521340 [patent_app_country] => US [patent_app_date] => 2021-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 12349 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17521340 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/521340
Controlling NAND operation latency Nov 7, 2021 Issued
Array ( [id] => 18720101 [patent_doc_number] => 11797446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Multi purpose server cache directory [patent_app_type] => utility [patent_app_number] => 17/452944 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9995 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17452944 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/452944
Multi purpose server cache directory Oct 28, 2021 Issued
Array ( [id] => 18802928 [patent_doc_number] => 11836085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Cache line coherence state upgrade [patent_app_type] => utility [patent_app_number] => 17/514792 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4815 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17514792 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/514792
Cache line coherence state upgrade Oct 28, 2021 Issued
Array ( [id] => 18262152 [patent_doc_number] => 11609854 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-03-21 [patent_title] => Utilizing checkpoints for resiliency of metadata in storage systems [patent_app_type] => utility [patent_app_number] => 17/512890 [patent_app_country] => US [patent_app_date] => 2021-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10578 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17512890 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/512890
Utilizing checkpoints for resiliency of metadata in storage systems Oct 27, 2021 Issued
Array ( [id] => 17415867 [patent_doc_number] => 20220050771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => OPERATING METHOD OF STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/506074 [patent_app_country] => US [patent_app_date] => 2021-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17506074 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/506074
Operating method of storage device Oct 19, 2021 Issued
Array ( [id] => 18324295 [patent_doc_number] => 20230122423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => INTEGRATED CIRCUIT AND METHOD FOR EXECUTING CACHE MANAGEMENT OPERATION [patent_app_type] => utility [patent_app_number] => 17/503382 [patent_app_country] => US [patent_app_date] => 2021-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6809 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17503382 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/503382
Integrated circuit and method for executing cache management operation Oct 17, 2021 Issued
Array ( [id] => 18286534 [patent_doc_number] => 20230102006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => TRANSLATION HINTS [patent_app_type] => utility [patent_app_number] => 17/484155 [patent_app_country] => US [patent_app_date] => 2021-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5936 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17484155 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/484155
Translation hints Sep 23, 2021 Issued
Array ( [id] => 17984705 [patent_doc_number] => 20220350742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => METHOD FOR MANAGING CACHE, METHOD FOR BALANCING MEMORY TRAFFIC, AND MEMORY CONTROLLING APPARATUS [patent_app_type] => utility [patent_app_number] => 17/464843 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17464843 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/464843
METHOD FOR MANAGING CACHE, METHOD FOR BALANCING MEMORY TRAFFIC, AND MEMORY CONTROLLING APPARATUS Sep 1, 2021 Abandoned
Array ( [id] => 19725888 [patent_doc_number] => 20250028639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => Method, Apparatus and System for Graph Data Caching [patent_app_type] => utility [patent_app_number] => 18/687473 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4479 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18687473 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/687473
Method, Apparatus and System for Graph Data Caching Aug 29, 2021 Pending
Array ( [id] => 18855637 [patent_doc_number] => 11853215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Memory controller, system including the same, and operating method of memory device for increasing a cache hit and reducing read latency using an integrated commad [patent_app_type] => utility [patent_app_number] => 17/408767 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 13488 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17408767 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/408767
Memory controller, system including the same, and operating method of memory device for increasing a cache hit and reducing read latency using an integrated commad Aug 22, 2021 Issued
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