
Shardul D. Patel
Examiner (ID: 4145, Phone: (571)270-7758 , Office: P/3662 )
| Most Active Art Unit | 3662 |
| Art Unit(s) | 3661, 3662, 3665, 3664 |
| Total Applications | 943 |
| Issued Applications | 799 |
| Pending Applications | 75 |
| Abandoned Applications | 97 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17447873
[patent_doc_number] => 20220068378
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => Memory Cell Including Programmable Resistors With Transistor Components
[patent_app_type] => utility
[patent_app_number] => 17/337781
[patent_app_country] => US
[patent_app_date] => 2021-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8202
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337781
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/337781 | Memory cell including programmable resistors with transistor components | Jun 2, 2021 | Issued |
Array
(
[id] => 17652445
[patent_doc_number] => 11355181
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-06-07
[patent_title] => High bandwidth memory and system having the same
[patent_app_type] => utility
[patent_app_number] => 17/333366
[patent_app_country] => US
[patent_app_date] => 2021-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 25
[patent_no_of_words] => 8981
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 302
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17333366
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/333366 | High bandwidth memory and system having the same | May 27, 2021 | Issued |
Array
(
[id] => 17893335
[patent_doc_number] => 11456319
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-27
[patent_title] => Three-dimensional semiconductor memory device, operating method of the same and electronic system including the same
[patent_app_type] => utility
[patent_app_number] => 17/329907
[patent_app_country] => US
[patent_app_date] => 2021-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 11893
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17329907
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/329907 | Three-dimensional semiconductor memory device, operating method of the same and electronic system including the same | May 24, 2021 | Issued |
Array
(
[id] => 18024441
[patent_doc_number] => 20220375940
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-24
[patent_title] => THIN FILM TRANSISTOR DECK SELECTION IN A MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/327042
[patent_app_country] => US
[patent_app_date] => 2021-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 24220
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17327042
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/327042 | Thin film transistor deck selection in a memory device | May 20, 2021 | Issued |
Array
(
[id] => 17745740
[patent_doc_number] => 11393822
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-07-19
[patent_title] => Thin film transistor deck selection in a memory device
[patent_app_type] => utility
[patent_app_number] => 17/327035
[patent_app_country] => US
[patent_app_date] => 2021-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 24215
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17327035
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/327035 | Thin film transistor deck selection in a memory device | May 20, 2021 | Issued |
Array
(
[id] => 17878644
[patent_doc_number] => 11450668
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-20
[patent_title] => Integrated memory comprising secondary access devices between digit lines and primary access devices
[patent_app_type] => utility
[patent_app_number] => 17/324976
[patent_app_country] => US
[patent_app_date] => 2021-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5081
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17324976
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/324976 | Integrated memory comprising secondary access devices between digit lines and primary access devices | May 18, 2021 | Issued |
Array
(
[id] => 17757970
[patent_doc_number] => 11398268
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-07-26
[patent_title] => Memory device and operation method for the same
[patent_app_type] => utility
[patent_app_number] => 17/321664
[patent_app_country] => US
[patent_app_date] => 2021-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 20
[patent_no_of_words] => 4219
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17321664
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/321664 | Memory device and operation method for the same | May 16, 2021 | Issued |
Array
(
[id] => 19552754
[patent_doc_number] => 12136465
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-05
[patent_title] => Semiconductor device and electronic device
[patent_app_type] => utility
[patent_app_number] => 17/922659
[patent_app_country] => US
[patent_app_date] => 2021-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 58
[patent_no_of_words] => 91024
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 402
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17922659
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/922659 | Semiconductor device and electronic device | May 5, 2021 | Issued |
Array
(
[id] => 17582577
[patent_doc_number] => 20220139432
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-05
[patent_title] => MEMORY PACKAGE, STORAGE DEVICE INCLUDING MEMORY PACKAGE, AND STORAGE DEVICE OPERATING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/243870
[patent_app_country] => US
[patent_app_date] => 2021-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11779
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17243870
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/243870 | Memory package, storage device including memory package, and storage device operating method | Apr 28, 2021 | Issued |
Array
(
[id] => 17447812
[patent_doc_number] => 20220068317
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => Integrated Assemblies, and Methods of Forming Integrated Assemblies
[patent_app_type] => utility
[patent_app_number] => 17/243937
[patent_app_country] => US
[patent_app_date] => 2021-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10248
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -30
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17243937
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/243937 | Integrated assemblies, and methods of forming integrated assemblies | Apr 28, 2021 | Issued |
Array
(
[id] => 18379460
[patent_doc_number] => 20230154549
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => SEMICONDUCTOR MEMORY
[patent_app_type] => utility
[patent_app_number] => 17/916927
[patent_app_country] => US
[patent_app_date] => 2021-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3499
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17916927
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/916927 | Semiconductor memory | Apr 27, 2021 | Issued |
Array
(
[id] => 18805909
[patent_doc_number] => 11839089
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-05
[patent_title] => Electronic device and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/242058
[patent_app_country] => US
[patent_app_date] => 2021-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 21
[patent_no_of_words] => 13496
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17242058
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/242058 | Electronic device and method for fabricating the same | Apr 26, 2021 | Issued |
Array
(
[id] => 18912074
[patent_doc_number] => 11875053
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-16
[patent_title] => Read operation circuit, semiconductor memory, and read operation method
[patent_app_type] => utility
[patent_app_number] => 17/240976
[patent_app_country] => US
[patent_app_date] => 2021-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 7228
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17240976
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/240976 | Read operation circuit, semiconductor memory, and read operation method | Apr 25, 2021 | Issued |
Array
(
[id] => 17963404
[patent_doc_number] => 20220343985
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-27
[patent_title] => POWER LOSS IMMUNITY IN MEMORY PROGRAMMING OPERATIONS
[patent_app_type] => utility
[patent_app_number] => 17/238818
[patent_app_country] => US
[patent_app_date] => 2021-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10030
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17238818
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/238818 | Power loss immunity in memory programming operations | Apr 22, 2021 | Issued |
Array
(
[id] => 17963823
[patent_doc_number] => 20220344404
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-27
[patent_title] => MEMORY UNIT, ARRAY AND OPERATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/239306
[patent_app_country] => US
[patent_app_date] => 2021-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3416
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17239306
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/239306 | Memory unit, array and operation method thereof | Apr 22, 2021 | Issued |
Array
(
[id] => 18494054
[patent_doc_number] => 11699475
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-11
[patent_title] => Ferroelectric memory plate power reduction
[patent_app_type] => utility
[patent_app_number] => 17/236724
[patent_app_country] => US
[patent_app_date] => 2021-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 16124
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17236724
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/236724 | Ferroelectric memory plate power reduction | Apr 20, 2021 | Issued |
Array
(
[id] => 17949004
[patent_doc_number] => 20220336023
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-20
[patent_title] => DETERMINING VOLTAGE OFFSETS FOR MEMORY READ OPERATIONS
[patent_app_type] => utility
[patent_app_number] => 17/233320
[patent_app_country] => US
[patent_app_date] => 2021-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12836
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17233320
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/233320 | Determining voltage offsets for memory read operations | Apr 15, 2021 | Issued |
Array
(
[id] => 16995175
[patent_doc_number] => 20210233595
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-29
[patent_title] => MEMORY DEVICES HAVING A DIFFERENTIAL STORAGE DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/230382
[patent_app_country] => US
[patent_app_date] => 2021-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11650
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17230382
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/230382 | Memory devices having a differential storage device | Apr 13, 2021 | Issued |
Array
(
[id] => 17318540
[patent_doc_number] => 20210407590
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-30
[patent_title] => SEMICONDUCTING METAL OXIDE MEMORY DEVICE USING HYDROGEN-MEDIATED THRESHOLD VOLTAGE MODULATION AND METHODS FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/229748
[patent_app_country] => US
[patent_app_date] => 2021-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15168
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17229748
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/229748 | Semiconducting metal oxide memory device using hydrogen-mediated threshold voltage modulation and methods for forming the same | Apr 12, 2021 | Issued |
Array
(
[id] => 19459426
[patent_doc_number] => 12099920
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-24
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/226965
[patent_app_country] => US
[patent_app_date] => 2021-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 7344
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 247
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17226965
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/226965 | Semiconductor device | Apr 8, 2021 | Issued |