Search

Shardul D. Patel

Examiner (ID: 4145, Phone: (571)270-7758 , Office: P/3662 )

Most Active Art Unit
3662
Art Unit(s)
3661, 3662, 3665, 3664
Total Applications
943
Issued Applications
799
Pending Applications
75
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16330741 [patent_doc_number] => 20200301707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => COMPUTATIONAL MEMORY CELL AND PROCESSING ARRAY DEVICE USING MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/895980 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16895980 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/895980
Computational memory cell and processing array device using memory cells Jun 7, 2020 Issued
Array ( [id] => 16676989 [patent_doc_number] => 20210065755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => MEMORY CONTROLLER AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/888492 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 46102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16888492 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/888492
Memory controller and operating method thereof May 28, 2020 Issued
Array ( [id] => 16315836 [patent_doc_number] => 20200294574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => SENSE AMPLIFIER FOR SENSING MULTI-LEVEL CELL AND MEMORY DEVICE INCLUDING THE SENSE AMPLIFER [patent_app_type] => utility [patent_app_number] => 16/888006 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16888006 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/888006
Sense amplifier for sensing multi-level cell and memory device including the sense amplifer May 28, 2020 Issued
Array ( [id] => 18015014 [patent_doc_number] => 11507310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Memory controller and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/888444 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 49 [patent_no_of_words] => 46207 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16888444 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/888444
Memory controller and operating method thereof May 28, 2020 Issued
Array ( [id] => 17771287 [patent_doc_number] => 11403229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Methods and apparatus to facilitate atomic operations in victim cache [patent_app_type] => utility [patent_app_number] => 16/882262 [patent_app_country] => US [patent_app_date] => 2020-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 54 [patent_no_of_words] => 95328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882262 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/882262
Methods and apparatus to facilitate atomic operations in victim cache May 21, 2020 Issued
Array ( [id] => 17032570 [patent_doc_number] => 11094387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Multi-fuse memory cell circuit and method [patent_app_type] => utility [patent_app_number] => 16/870007 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4034 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16870007 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/870007
Multi-fuse memory cell circuit and method May 7, 2020 Issued
Array ( [id] => 16759924 [patent_doc_number] => 10978481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Nonvolatile memory device having a vertical structure and a memory system including the same [patent_app_type] => utility [patent_app_number] => 16/861939 [patent_app_country] => US [patent_app_date] => 2020-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 10396 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16861939 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/861939
Nonvolatile memory device having a vertical structure and a memory system including the same Apr 28, 2020 Issued
Array ( [id] => 17122321 [patent_doc_number] => 11133466 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-09-28 [patent_title] => Methods for controlling switching characteristics of a correlated electron material device [patent_app_type] => utility [patent_app_number] => 16/862428 [patent_app_country] => US [patent_app_date] => 2020-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 10006 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16862428 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/862428
Methods for controlling switching characteristics of a correlated electron material device Apr 28, 2020 Issued
Array ( [id] => 16536282 [patent_doc_number] => 10878895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Semiconductor memory device which stores plural data in a cell [patent_app_type] => utility [patent_app_number] => 16/857611 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 105 [patent_no_of_words] => 38520 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16857611 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/857611
Semiconductor memory device which stores plural data in a cell Apr 23, 2020 Issued
Array ( [id] => 17283916 [patent_doc_number] => 11200956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Read level calibration in memory devices using embedded servo cells [patent_app_type] => utility [patent_app_number] => 16/856587 [patent_app_country] => US [patent_app_date] => 2020-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6408 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16856587 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/856587
Read level calibration in memory devices using embedded servo cells Apr 22, 2020 Issued
Array ( [id] => 16578427 [patent_doc_number] => 20210012828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => VERTICAL MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/854382 [patent_app_country] => US [patent_app_date] => 2020-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19364 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854382 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/854382
Vertical memory device Apr 20, 2020 Issued
Array ( [id] => 17173824 [patent_doc_number] => 20210327495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => IN-MEMORY COMPUTING USING A STATIC RANDOM-ACCESS MEMORY (SRAM) [patent_app_type] => utility [patent_app_number] => 16/850492 [patent_app_country] => US [patent_app_date] => 2020-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16850492 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/850492
In-memory computing using a static random-access memory (SRAM) Apr 15, 2020 Issued
Array ( [id] => 16811800 [patent_doc_number] => 20210134355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/848304 [patent_app_country] => US [patent_app_date] => 2020-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10313 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16848304 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/848304
Semiconductor memory device Apr 13, 2020 Issued
Array ( [id] => 16987796 [patent_doc_number] => 11074975 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-27 [patent_title] => Non-volatile register and implementation of non-volatile register [patent_app_type] => utility [patent_app_number] => 16/841711 [patent_app_country] => US [patent_app_date] => 2020-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3853 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16841711 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/841711
Non-volatile register and implementation of non-volatile register Apr 6, 2020 Issued
Array ( [id] => 16593642 [patent_doc_number] => 10902918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/842633 [patent_app_country] => US [patent_app_date] => 2020-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 25 [patent_no_of_words] => 13662 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16842633 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/842633
Semiconductor storage device Apr 6, 2020 Issued
Array ( [id] => 16677014 [patent_doc_number] => 20210065780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => MEMORY CONTROLLER AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/841030 [patent_app_country] => US [patent_app_date] => 2020-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16841030 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/841030
Memory controller and operating method thereof Apr 5, 2020 Issued
Array ( [id] => 16502292 [patent_doc_number] => 10867686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Semiconductor memory device for storing multivalued data [patent_app_type] => utility [patent_app_number] => 16/840615 [patent_app_country] => US [patent_app_date] => 2020-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 92 [patent_no_of_words] => 28714 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16840615 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/840615
Semiconductor memory device for storing multivalued data Apr 5, 2020 Issued
Array ( [id] => 16193922 [patent_doc_number] => 20200234771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => METHODS OF OPERATING MEMORY DEVICES BASED ON SUB-BLOCK POSITIONS AND RELATED MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/840290 [patent_app_country] => US [patent_app_date] => 2020-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16840290 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/840290
Methods of operating memory devices based on sub-block positions and related memory system Apr 2, 2020 Issued
Array ( [id] => 16973406 [patent_doc_number] => 11069385 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-20 [patent_title] => Integrated assemblies comprising folded-digit-line-configurations [patent_app_type] => utility [patent_app_number] => 16/835797 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6954 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16835797 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/835797
Integrated assemblies comprising folded-digit-line-configurations Mar 30, 2020 Issued
Array ( [id] => 17130053 [patent_doc_number] => 20210304822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => PEAK AND AVERAGE CURRENT REDUCTION FOR SUB BLOCK MEMORY OPERATION [patent_app_type] => utility [patent_app_number] => 16/832293 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14869 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16832293 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/832293
Peak and average current reduction for sub block memory operation Mar 26, 2020 Issued
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