Sharlene L Leurig

Array ( [id] => 19030065 [patent_doc_number] => 11929434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => High voltage switch device [patent_app_type] => utility [patent_app_number] => 17/721367 [patent_app_country] => US [patent_app_date] => 2022-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3330 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17721367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18783946 [patent_doc_number] => 11825755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Non-volatile memory device and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 17/716895 [patent_app_country] => US [patent_app_date] => 2022-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 9448 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17716895 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19137977 [patent_doc_number] => 11972951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Selective formation of titanium silicide and titanium nitride by hydrogen gas control [patent_app_type] => utility [patent_app_number] => 17/712480 [patent_app_country] => US [patent_app_date] => 2022-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11769 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17712480 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18768474 [patent_doc_number] => 11818898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Magnetoresistive memory device and method of manufacturing magnetoresistive memory device [patent_app_type] => utility [patent_app_number] => 17/680772 [patent_app_country] => US [patent_app_date] => 2022-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 6414 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17680772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18999136 [patent_doc_number] => 11915992 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Method for forming package structure with lid [patent_app_type] => utility [patent_app_number] => 17/679372 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5987 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17679372 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18841556 [patent_doc_number] => 11849654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Proton-based two-terminal volatile memristive devices [patent_app_type] => utility [patent_app_number] => 17/648494 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 5304 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648494 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18891182 [patent_doc_number] => 11869961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Semiconductor device and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/578996 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 15614 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17578996 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17583381 [patent_doc_number] => 20220140236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => MANUFACTURING METHOD OF RESISTIVE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/577034 [patent_app_country] => US [patent_app_date] => 2022-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17577034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17660741 [patent_doc_number] => 20220181206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => SEMICONDUCTOR STRUCTURE WITH A LAMINATED LAYER [patent_app_type] => utility [patent_app_number] => 17/646901 [patent_app_country] => US [patent_app_date] => 2022-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12866 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17646901 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17509273 [patent_doc_number] => 20220102376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/549456 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549456 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18426167 [patent_doc_number] => 20230180632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => MONOLITHIC SILICON JOSEPHSON JUNCTIONS FOR SUPERCONDUCTING QUBITS [patent_app_type] => utility [patent_app_number] => 17/545207 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9593 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17486355 [patent_doc_number] => 20220093859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => METHOD OF MANUFACTURING RESISTIVE RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 17/543732 [patent_app_country] => US [patent_app_date] => 2021-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17543732 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18424156 [patent_doc_number] => 20230178620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => GATE-ALL-AROUND MONOLITHIC STACKED FIELD EFFECT TRANSISTORS HAVING MULTIPLE THRESHOLD VOLTAGES [patent_app_type] => utility [patent_app_number] => 17/543028 [patent_app_country] => US [patent_app_date] => 2021-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8877 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17543028 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18736902 [patent_doc_number] => 11805658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Magnetic random access memory and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/537119 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 36 [patent_no_of_words] => 9838 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17537119 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17477368 [patent_doc_number] => 20220084872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => IMAGING DEVICE, METHOD OF MANUFACTURING IMAGING DEVICE, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/456664 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17456664 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17477407 [patent_doc_number] => 20220084911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => SEMICONDUCTOR ARRANGEMENT AND METHOD FOR MAKING [patent_app_type] => utility [patent_app_number] => 17/536304 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6665 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536304 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17477700 [patent_doc_number] => 20220085204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR [patent_app_type] => utility [patent_app_number] => 17/534084 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7270 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17534084 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17708846 [patent_doc_number] => 20220208854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/455487 [patent_app_country] => US [patent_app_date] => 2021-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455487 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19079552 [patent_doc_number] => 11948932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Integrated circuit including standard cell and filler cell [patent_app_type] => utility [patent_app_number] => 17/528242 [patent_app_country] => US [patent_app_date] => 2021-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13571 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17528242 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18528794 [patent_doc_number] => 11715799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Methods and apparatus to form silicon-based transistors on group III-nitride materials using aspect ratio trapping [patent_app_type] => utility [patent_app_number] => 17/526562 [patent_app_country] => US [patent_app_date] => 2021-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5654 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17526562 [rel_patent_id] =>[rel_patent_doc_number] =>)