Search

Sharlene L Leurig

Examiner (ID: 918)

Most Active Art Unit
2879
Art Unit(s)
2879
Total Applications
146
Issued Applications
124
Pending Applications
2
Abandoned Applications
20

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17232647 [patent_doc_number] => 20210359204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => RESISTIVE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/905858 [patent_app_country] => US [patent_app_date] => 2020-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6231 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16905858 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/905858
Resistive memory device and manufacturing method thereof Jun 17, 2020 Issued
Array ( [id] => 17303373 [patent_doc_number] => 20210399212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => DIELECTRIC RETENTION AND METHOD OF FORMING MEMORY PILLAR [patent_app_type] => utility [patent_app_number] => 16/903516 [patent_app_country] => US [patent_app_date] => 2020-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16903516 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/903516
Dielectric retention and method of forming memory pillar Jun 16, 2020 Issued
Array ( [id] => 17295153 [patent_doc_number] => 20210390992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR MEMORY STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/902218 [patent_app_country] => US [patent_app_date] => 2020-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16902218 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/902218
Method for forming semiconductor memory structure Jun 14, 2020 Issued
Array ( [id] => 18359260 [patent_doc_number] => 11647680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Oxide-based resistive memory having a plasma-exposed bottom electrode [patent_app_type] => utility [patent_app_number] => 16/898527 [patent_app_country] => US [patent_app_date] => 2020-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 8451 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16898527 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/898527
Oxide-based resistive memory having a plasma-exposed bottom electrode Jun 10, 2020 Issued
Array ( [id] => 18105716 [patent_doc_number] => 11545616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Magnetic memory device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/893594 [patent_app_country] => US [patent_app_date] => 2020-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 52 [patent_no_of_words] => 10675 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16893594 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/893594
Magnetic memory device and method for manufacturing the same Jun 4, 2020 Issued
Array ( [id] => 16850757 [patent_doc_number] => 20210151502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE AND EMBEDDED DEVICE [patent_app_type] => utility [patent_app_number] => 16/892583 [patent_app_country] => US [patent_app_date] => 2020-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16892583 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/892583
MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE AND EMBEDDED DEVICE Jun 3, 2020 Abandoned
Array ( [id] => 18403817 [patent_doc_number] => 11665977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Magnetic tunnel junction device and method [patent_app_type] => utility [patent_app_number] => 16/887244 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 13460 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16887244 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/887244
Magnetic tunnel junction device and method May 28, 2020 Issued
Array ( [id] => 16316069 [patent_doc_number] => 20200294807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => SELECTIVE FORMATION OF TITANIUM SILICIDE AND TITANIUM NITRIDE BY HYDROGEN GAS CONTROL [patent_app_type] => utility [patent_app_number] => 16/887218 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11748 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16887218 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/887218
Selective formation of titanium silicide and titanium nitride by hydrogen gas control May 28, 2020 Issued
Array ( [id] => 17263003 [patent_doc_number] => 20210375988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => SELF-ALIGNED DIELECTRIC SPACER FOR MAGNETIC TUNNEL JUNCTION PATTERNING AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/885367 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11310 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885367 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/885367
Self-aligned dielectric spacer for magnetic tunnel junction patterning and methods for forming the same May 27, 2020 Issued
Array ( [id] => 17263241 [patent_doc_number] => 20210376226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => MRAM CELL, MRAM AND IC WITH MRAM [patent_app_type] => utility [patent_app_number] => 16/884297 [patent_app_country] => US [patent_app_date] => 2020-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10414 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16884297 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/884297
MRAM cell, MRAM and IC with MRAM May 26, 2020 Issued
Array ( [id] => 18277244 [patent_doc_number] => 11616195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Dual oxide analog switch for neuromorphic switching [patent_app_type] => utility [patent_app_number] => 16/883009 [patent_app_country] => US [patent_app_date] => 2020-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5534 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883009 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/883009
Dual oxide analog switch for neuromorphic switching May 25, 2020 Issued
Array ( [id] => 17232640 [patent_doc_number] => 20210359197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => SCALABLE HEAT SINK AND MAGNETIC SHIELDING FOR HIGH DENSITY MRAM ARRAYS [patent_app_type] => utility [patent_app_number] => 16/874002 [patent_app_country] => US [patent_app_date] => 2020-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4752 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16874002 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/874002
Scalable heat sink and magnetic shielding for high density MRAM arrays May 13, 2020 Issued
Array ( [id] => 17848051 [patent_doc_number] => 11437437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Electronic device and method for manufacturing electronic device [patent_app_type] => utility [patent_app_number] => 16/860686 [patent_app_country] => US [patent_app_date] => 2020-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 9456 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16860686 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/860686
Electronic device and method for manufacturing electronic device Apr 27, 2020 Issued
Array ( [id] => 18120844 [patent_doc_number] => 11552243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => MRAM structure with ternary weight storage [patent_app_type] => utility [patent_app_number] => 16/857928 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7546 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16857928 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/857928
MRAM structure with ternary weight storage Apr 23, 2020 Issued
Array ( [id] => 18203485 [patent_doc_number] => 11585874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Magnetic tunnel junction device [patent_app_type] => utility [patent_app_number] => 16/855403 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8787 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16855403 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/855403
Magnetic tunnel junction device Apr 21, 2020 Issued
Array ( [id] => 17652953 [patent_doc_number] => 11355695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Magnetic memory device having shared source line and bit line [patent_app_type] => utility [patent_app_number] => 16/852542 [patent_app_country] => US [patent_app_date] => 2020-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 8107 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16852542 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/852542
Magnetic memory device having shared source line and bit line Apr 18, 2020 Issued
Array ( [id] => 17745666 [patent_doc_number] => 11393748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Stack of horizontally extending and vertically overlapping features, methods of forming circuitry components, and methods of forming an array of memory cells [patent_app_type] => utility [patent_app_number] => 16/850692 [patent_app_country] => US [patent_app_date] => 2020-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6157 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16850692 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/850692
Stack of horizontally extending and vertically overlapping features, methods of forming circuitry components, and methods of forming an array of memory cells Apr 15, 2020 Issued
Array ( [id] => 16731551 [patent_doc_number] => 20210098699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => METHOD OF MAKING RESISTIVE STRUCTURE OF RRAM [patent_app_type] => utility [patent_app_number] => 16/850993 [patent_app_country] => US [patent_app_date] => 2020-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2294 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16850993 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/850993
Method of making resistive structure of RRAM Apr 15, 2020 Issued
Array ( [id] => 16896467 [patent_doc_number] => 11038030 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Transistor having low capacitance field plate structure [patent_app_type] => utility [patent_app_number] => 16/846902 [patent_app_country] => US [patent_app_date] => 2020-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 29 [patent_no_of_words] => 3896 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16846902 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/846902
Transistor having low capacitance field plate structure Apr 12, 2020 Issued
Array ( [id] => 16180407 [patent_doc_number] => 20200227376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => FOWBCSP CHIP MODULE WITH PACKAGING STRUCTURE AND MANUFACTURING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 16/835345 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16835345 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/835345
FOWBCSP CHIP MODULE WITH PACKAGING STRUCTURE AND MANUFACTURING METHOD OF THE SAME Mar 30, 2020 Abandoned
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