
Sharmin Akhter
Examiner (ID: 2388, Phone: (571)272-9365 , Office: P/2682 )
| Most Active Art Unit | 2689 |
| Art Unit(s) | 2682, 2689, 2612 |
| Total Applications | 487 |
| Issued Applications | 339 |
| Pending Applications | 37 |
| Abandoned Applications | 115 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6551777
[patent_doc_number] => 20020194282
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-19
[patent_title] => 'Data communication apparatus and internet facsimile apparatus'
[patent_app_type] => new
[patent_app_number] => 09/984741
[patent_app_country] => US
[patent_app_date] => 2001-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4099
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0194/20020194282.pdf
[firstpage_image] =>[orig_patent_app_number] => 09984741
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/984741 | Data communication apparatus and internet facsimile apparatus | Oct 30, 2001 | Abandoned |
Array
(
[id] => 6795460
[patent_doc_number] => 20030174333
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-09-18
[patent_title] => 'Apparatus for and method of optical detection and analysis of an object'
[patent_app_type] => new
[patent_app_number] => 10/332803
[patent_app_country] => US
[patent_app_date] => 2003-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4151
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 13
[patent_words_short_claim] => 16
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0174/20030174333.pdf
[firstpage_image] =>[orig_patent_app_number] => 10332803
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/332803 | Apparatus for and method of optical detection and analysis of an object | Jul 11, 2001 | Issued |
Array
(
[id] => 6133545
[patent_doc_number] => 20020078131
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-06-20
[patent_title] => 'Method and system for presenting operational data by geographical location'
[patent_app_type] => new
[patent_app_number] => 09/896927
[patent_app_country] => US
[patent_app_date] => 2001-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5247
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0078/20020078131.pdf
[firstpage_image] =>[orig_patent_app_number] => 09896927
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/896927 | Method and system for presenting operational data by geographical location | Jun 27, 2001 | Abandoned |
Array
(
[id] => 7635004
[patent_doc_number] => 06381662
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-30
[patent_title] => 'Removable mother/daughter peripheral card'
[patent_app_type] => B1
[patent_app_number] => 09/887197
[patent_app_country] => US
[patent_app_date] => 2001-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 7992
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 14
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/381/06381662.pdf
[firstpage_image] =>[orig_patent_app_number] => 09887197
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/887197 | Removable mother/daughter peripheral card | Jun 20, 2001 | Issued |
Array
(
[id] => 1549663
[patent_doc_number] => 06374351
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-16
[patent_title] => 'Software branch prediction filtering for a microprocessor'
[patent_app_type] => B1
[patent_app_number] => 09/829525
[patent_app_country] => US
[patent_app_date] => 2001-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4783
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/374/06374351.pdf
[firstpage_image] =>[orig_patent_app_number] => 09829525
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/829525 | Software branch prediction filtering for a microprocessor | Apr 9, 2001 | Issued |
Array
(
[id] => 7642369
[patent_doc_number] => 06430677
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-08-06
[patent_title] => 'Methods and apparatus for dynamic instruction controlled reconfigurable register file with extended precision'
[patent_app_type] => B2
[patent_app_number] => 09/796037
[patent_app_country] => US
[patent_app_date] => 2001-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4459
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 11
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/430/06430677.pdf
[firstpage_image] =>[orig_patent_app_number] => 09796037
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/796037 | Methods and apparatus for dynamic instruction controlled reconfigurable register file with extended precision | Feb 27, 2001 | Issued |
Array
(
[id] => 1506060
[patent_doc_number] => 06487675
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-11-26
[patent_title] => 'Processor having execution core sections operating at different clock rates'
[patent_app_type] => B2
[patent_app_number] => 09/775383
[patent_app_country] => US
[patent_app_date] => 2001-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 9187
[patent_no_of_claims] => 53
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/487/06487675.pdf
[firstpage_image] =>[orig_patent_app_number] => 09775383
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/775383 | Processor having execution core sections operating at different clock rates | Feb 1, 2001 | Issued |
Array
(
[id] => 6019826
[patent_doc_number] => 20020103921
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-01
[patent_title] => 'Method and system for routing broadband internet traffic'
[patent_app_type] => new
[patent_app_number] => 09/774016
[patent_app_country] => US
[patent_app_date] => 2001-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8099
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0103/20020103921.pdf
[firstpage_image] =>[orig_patent_app_number] => 09774016
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/774016 | Method and system for routing broadband internet traffic | Jan 30, 2001 | Abandoned |
Array
(
[id] => 6874980
[patent_doc_number] => 20010000046
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-03-15
[patent_title] => 'Architecture for a processor complex of an arrayed pipelined processing engine'
[patent_app_type] => new-utility
[patent_app_number] => 09/727068
[patent_app_country] => US
[patent_app_date] => 2000-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7466
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0000/20010000046.pdf
[firstpage_image] =>[orig_patent_app_number] => 09727068
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/727068 | Architecture for a process complex of an arrayed pipelined processing engine | Nov 29, 2000 | Issued |
Array
(
[id] => 1475031
[patent_doc_number] => 06408384
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-18
[patent_title] => 'Cache fencing for interpretive environments'
[patent_app_type] => B1
[patent_app_number] => 09/705370
[patent_app_country] => US
[patent_app_date] => 2000-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 16163
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/408/06408384.pdf
[firstpage_image] =>[orig_patent_app_number] => 09705370
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/705370 | Cache fencing for interpretive environments | Nov 2, 2000 | Issued |
Array
(
[id] => 1497871
[patent_doc_number] => 06343357
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-01-29
[patent_title] => 'Microcomputer and dividing circuit'
[patent_app_type] => B1
[patent_app_number] => 09/632332
[patent_app_country] => US
[patent_app_date] => 2000-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 87
[patent_figures_cnt] => 100
[patent_no_of_words] => 37436
[patent_no_of_claims] => 58
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/343/06343357.pdf
[firstpage_image] =>[orig_patent_app_number] => 09632332
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/632332 | Microcomputer and dividing circuit | Aug 2, 2000 | Issued |
Array
(
[id] => 4324611
[patent_doc_number] => 06327647
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-04
[patent_title] => 'Method and apparatus for interfacing a processor to a coprocessor'
[patent_app_type] => 1
[patent_app_number] => 9/609260
[patent_app_country] => US
[patent_app_date] => 2000-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 26
[patent_no_of_words] => 7114
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/327/06327647.pdf
[firstpage_image] =>[orig_patent_app_number] => 609260
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/609260 | Method and apparatus for interfacing a processor to a coprocessor | Jun 29, 2000 | Issued |
Array
(
[id] => 7634978
[patent_doc_number] => 06381688
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-30
[patent_title] => 'Serial port for a hose adapter integrated circuit using a single terminal'
[patent_app_type] => B1
[patent_app_number] => 09/579863
[patent_app_country] => US
[patent_app_date] => 2000-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 38
[patent_no_of_words] => 24075
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 4
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/381/06381688.pdf
[firstpage_image] =>[orig_patent_app_number] => 09579863
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/579863 | Serial port for a hose adapter integrated circuit using a single terminal | May 24, 2000 | Issued |
Array
(
[id] => 4381843
[patent_doc_number] => 06256745
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Processor having execution core sections operating at different clock rates'
[patent_app_type] => 1
[patent_app_number] => 9/527065
[patent_app_country] => US
[patent_app_date] => 2000-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 9101
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/256/06256745.pdf
[firstpage_image] =>[orig_patent_app_number] => 527065
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/527065 | Processor having execution core sections operating at different clock rates | Mar 15, 2000 | Issued |
Array
(
[id] => 1218211
[patent_doc_number] => 06711666
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-23
[patent_title] => 'IBM PC compatible multi-chip module'
[patent_app_type] => B1
[patent_app_number] => 09/524858
[patent_app_country] => US
[patent_app_date] => 2000-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 11236
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/711/06711666.pdf
[firstpage_image] =>[orig_patent_app_number] => 09524858
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/524858 | IBM PC compatible multi-chip module | Mar 13, 2000 | Issued |
Array
(
[id] => 7644182
[patent_doc_number] => 06473792
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-29
[patent_title] => 'Method of simulating broadband internet content downloads'
[patent_app_type] => B1
[patent_app_number] => 09/523253
[patent_app_country] => US
[patent_app_date] => 2000-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 5913
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 13
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/473/06473792.pdf
[firstpage_image] =>[orig_patent_app_number] => 09523253
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/523253 | Method of simulating broadband internet content downloads | Mar 9, 2000 | Issued |
Array
(
[id] => 1408651
[patent_doc_number] => 06557036
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-04-29
[patent_title] => 'Methods and apparatus for site wide monitoring of electronic mail systems'
[patent_app_type] => B1
[patent_app_number] => 09/520865
[patent_app_country] => US
[patent_app_date] => 2000-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6065
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/557/06557036.pdf
[firstpage_image] =>[orig_patent_app_number] => 09520865
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/520865 | Methods and apparatus for site wide monitoring of electronic mail systems | Mar 6, 2000 | Issued |
Array
(
[id] => 4273888
[patent_doc_number] => 06209087
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-27
[patent_title] => 'Data processor with multiple compare extension instruction'
[patent_app_type] => 1
[patent_app_number] => 9/484158
[patent_app_country] => US
[patent_app_date] => 2000-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 10729
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/209/06209087.pdf
[firstpage_image] =>[orig_patent_app_number] => 484158
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/484158 | Data processor with multiple compare extension instruction | Jan 17, 2000 | Issued |
Array
(
[id] => 1459874
[patent_doc_number] => 06463469
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-08
[patent_title] => 'Computer-based RDS/MBS receiver system for use with radio broadcast signal'
[patent_app_type] => B1
[patent_app_number] => 09/484334
[patent_app_country] => US
[patent_app_date] => 2000-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4347
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/463/06463469.pdf
[firstpage_image] =>[orig_patent_app_number] => 09484334
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/484334 | Computer-based RDS/MBS receiver system for use with radio broadcast signal | Jan 17, 2000 | Issued |
Array
(
[id] => 4292397
[patent_doc_number] => 06247110
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-12
[patent_title] => 'Multiprocessor computer architecture incorporating a plurality of memory algorithm processors in the memory subsystem'
[patent_app_type] => 1
[patent_app_number] => 9/481902
[patent_app_country] => US
[patent_app_date] => 2000-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3404
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/247/06247110.pdf
[firstpage_image] =>[orig_patent_app_number] => 481902
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/481902 | Multiprocessor computer architecture incorporating a plurality of memory algorithm processors in the memory subsystem | Jan 11, 2000 | Issued |