
Sharon Pregler
Examiner (ID: 3287)
| Most Active Art Unit | 1772 |
| Art Unit(s) | 1797, 1772 |
| Total Applications | 1180 |
| Issued Applications | 897 |
| Pending Applications | 82 |
| Abandoned Applications | 224 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 894979
[patent_doc_number] => 07341905
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-03-11
[patent_title] => 'Method of making high-voltage bipolar/CMOS/DMOS (BCD) devices'
[patent_app_type] => utility
[patent_app_number] => 11/020217
[patent_app_country] => US
[patent_app_date] => 2004-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 61
[patent_no_of_words] => 11708
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 628
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/341/07341905.pdf
[firstpage_image] =>[orig_patent_app_number] => 11020217
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/020217 | Method of making high-voltage bipolar/CMOS/DMOS (BCD) devices | Dec 26, 2004 | Issued |
Array
(
[id] => 5656007
[patent_doc_number] => 20060141743
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-29
[patent_title] => 'Method and system for 3D alignment in wafer scale integration'
[patent_app_type] => utility
[patent_app_number] => 11/020556
[patent_app_country] => US
[patent_app_date] => 2004-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 11386
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0141/20060141743.pdf
[firstpage_image] =>[orig_patent_app_number] => 11020556
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/020556 | Method and system for 3D alignment in wafer scale integration | Dec 26, 2004 | Issued |
Array
(
[id] => 7235297
[patent_doc_number] => 20050139816
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-30
[patent_title] => 'Memory devices having sharp-tipped phase change layer patterns and methods of forming the same'
[patent_app_type] => utility
[patent_app_number] => 11/018643
[patent_app_country] => US
[patent_app_date] => 2004-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5706
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0139/20050139816.pdf
[firstpage_image] =>[orig_patent_app_number] => 11018643
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/018643 | Memory devices having sharp-tipped phase change layer patterns | Dec 20, 2004 | Issued |
Array
(
[id] => 5136056
[patent_doc_number] => 20070077685
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-05
[patent_title] => 'Production method of semiconductor chip'
[patent_app_type] => utility
[patent_app_number] => 10/595871
[patent_app_country] => US
[patent_app_date] => 2004-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10785
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0077/20070077685.pdf
[firstpage_image] =>[orig_patent_app_number] => 10595871
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/595871 | Production method of semiconductor chip | Oct 19, 2004 | Issued |
Array
(
[id] => 5034782
[patent_doc_number] => 20070099321
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-03
[patent_title] => 'Method for fabricating semiconductor laser device'
[patent_app_type] => utility
[patent_app_number] => 10/581202
[patent_app_country] => US
[patent_app_date] => 2004-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 12665
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0099/20070099321.pdf
[firstpage_image] =>[orig_patent_app_number] => 10581202
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/581202 | Method for fabricating semiconductor laser device | Sep 26, 2004 | Abandoned |
Array
(
[id] => 582061
[patent_doc_number] => 07449397
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-11
[patent_title] => 'Method for annealing silicon thin films and polycrystalline silicon thin films prepared therefrom'
[patent_app_type] => utility
[patent_app_number] => 10/558511
[patent_app_country] => US
[patent_app_date] => 2004-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 9341
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/449/07449397.pdf
[firstpage_image] =>[orig_patent_app_number] => 10558511
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/558511 | Method for annealing silicon thin films and polycrystalline silicon thin films prepared therefrom | May 26, 2004 | Issued |
Array
(
[id] => 572914
[patent_doc_number] => 07459320
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-02
[patent_title] => 'Method for producing a photovoltaic device'
[patent_app_type] => utility
[patent_app_number] => 10/551172
[patent_app_country] => US
[patent_app_date] => 2004-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2464
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/459/07459320.pdf
[firstpage_image] =>[orig_patent_app_number] => 10551172
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/551172 | Method for producing a photovoltaic device | Mar 25, 2004 | Issued |
Array
(
[id] => 5724136
[patent_doc_number] => 20060054896
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-16
[patent_title] => 'Active matrix display devices and the manufacture thereof'
[patent_app_type] => utility
[patent_app_number] => 10/515163
[patent_app_country] => US
[patent_app_date] => 2003-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3501
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0054/20060054896.pdf
[firstpage_image] =>[orig_patent_app_number] => 10515163
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/515163 | Active matrix display devices and the manufacture thereof | May 14, 2003 | Issued |
Array
(
[id] => 5119114
[patent_doc_number] => 20070140828
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-21
[patent_title] => 'Silicon wafer and method for production of silicon wafer'
[patent_app_type] => utility
[patent_app_number] => 10/499612
[patent_app_country] => US
[patent_app_date] => 2002-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3235
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0140/20070140828.pdf
[firstpage_image] =>[orig_patent_app_number] => 10499612
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/499612 | Silicon wafer and method for production of silicon wafer | Dec 17, 2002 | Abandoned |