Shawn M Buchanan

Array ( [id] => 3879372 [patent_doc_number] => 05794057 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Circuit for reducing audio amplifier noise during powering on and off' [patent_app_type] => 1 [patent_app_number] => 8/818346 [patent_app_country] => US [patent_app_date] => 1997-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3837 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/794/05794057.pdf [firstpage_image] =>[orig_patent_app_number] => 818346 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4085079 [patent_doc_number] => 06009489 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Method and system for supporting non-deterministic burst lengths in a memory system employing extended data out(EDO)DRAM' [patent_app_type] => 1 [patent_app_number] => 8/818235 [patent_app_country] => US [patent_app_date] => 1997-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4518 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009489.pdf [firstpage_image] =>[orig_patent_app_number] => 818235 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3973286 [patent_doc_number] => 05978881 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Scalable switcher with detachably securable frame adapter cards for routing audio and video signals' [patent_app_type] => 1 [patent_app_number] => 8/803784 [patent_app_country] => US [patent_app_date] => 1997-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3456 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978881.pdf [firstpage_image] =>[orig_patent_app_number] => 803784 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4100384 [patent_doc_number] => 06055640 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Power estimation of a microprocessor based on power consumption of memory' [patent_app_type] => 1 [patent_app_number] => 8/797783 [patent_app_country] => US [patent_app_date] => 1997-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 6536 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055640.pdf [firstpage_image] =>[orig_patent_app_number] => 797783 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4132998 [patent_doc_number] => 06047347 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Computer system with programmable bus size' [patent_app_type] => 1 [patent_app_number] => 8/816944 [patent_app_country] => US [patent_app_date] => 1997-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3159 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/047/06047347.pdf [firstpage_image] =>[orig_patent_app_number] => 816944 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4026319 [patent_doc_number] => 05941989 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Apparatus for indicating power-consumption status in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/779578 [patent_app_country] => US [patent_app_date] => 1997-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4315 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/941/05941989.pdf [firstpage_image] =>[orig_patent_app_number] => 779578 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3926050 [patent_doc_number] => 06002675 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Method and apparatus for controlling transmission of data over a network' [patent_app_type] => 1 [patent_app_number] => 8/779877 [patent_app_country] => US [patent_app_date] => 1997-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 20 [patent_no_of_words] => 21332 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/002/06002675.pdf [firstpage_image] =>[orig_patent_app_number] => 779877 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3916328 [patent_doc_number] => 05951689 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Microprocessor power control system' [patent_app_type] => 1 [patent_app_number] => 8/775629 [patent_app_country] => US [patent_app_date] => 1996-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2267 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/951/05951689.pdf [firstpage_image] =>[orig_patent_app_number] => 775629 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4268826 [patent_doc_number] => 06138192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Delivering a request to write or read data before delivering an earlier write request' [patent_app_type] => 1 [patent_app_number] => 8/777575 [patent_app_country] => US [patent_app_date] => 1996-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5199 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/138/06138192.pdf [firstpage_image] =>[orig_patent_app_number] => 777575 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4029938 [patent_doc_number] => 05907689 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Master-target based arbitration priority' [patent_app_type] => 1 [patent_app_number] => 8/777826 [patent_app_country] => US [patent_app_date] => 1996-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 18231 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907689.pdf [firstpage_image] =>[orig_patent_app_number] => 777826 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4031766 [patent_doc_number] => 05881297 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Apparatus and method for controlling clocking frequency in an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/775783 [patent_app_country] => US [patent_app_date] => 1996-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3820 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881297.pdf [firstpage_image] =>[orig_patent_app_number] => 775783 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4008174 [patent_doc_number] => 05892929 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Avoiding non-unique identifiers for bus devices' [patent_app_type] => 1 [patent_app_number] => 8/777230 [patent_app_country] => US [patent_app_date] => 1996-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4842 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/892/05892929.pdf [firstpage_image] =>[orig_patent_app_number] => 777230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3998024 [patent_doc_number] => 05862359 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-19 [patent_title] => 'Data transfer bus including divisional buses connectable by bus switch circuit' [patent_app_type] => 1 [patent_app_number] => 8/758580 [patent_app_country] => US [patent_app_date] => 1996-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4117 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/862/05862359.pdf [firstpage_image] =>[orig_patent_app_number] => 758580 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3967012 [patent_doc_number] => 05983304 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Buffer flush controller of a peripheral component interconnect-peripheral component interconnect bridge' [patent_app_type] => 1 [patent_app_number] => 8/759880 [patent_app_country] => US [patent_app_date] => 1996-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6660 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/983/05983304.pdf [firstpage_image] =>[orig_patent_app_number] => 759880 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4014517 [patent_doc_number] => 05923856 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Control system for coping with bus extension in controlling a communication apparatus' [patent_app_type] => 1 [patent_app_number] => 8/757377 [patent_app_country] => US [patent_app_date] => 1996-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 89 [patent_no_of_words] => 39832 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 339 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923856.pdf [firstpage_image] =>[orig_patent_app_number] => 757377 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4008284 [patent_doc_number] => 05920709 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Bus interface for IDE device' [patent_app_type] => 1 [patent_app_number] => 8/751681 [patent_app_country] => US [patent_app_date] => 1996-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 9644 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920709.pdf [firstpage_image] =>[orig_patent_app_number] => 751681 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4037881 [patent_doc_number] => 05926640 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Skipping clock interrupts during system inactivity to reduce power consumption' [patent_app_type] => 1 [patent_app_number] => 8/743377 [patent_app_country] => US [patent_app_date] => 1996-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5359 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/926/05926640.pdf [firstpage_image] =>[orig_patent_app_number] => 743377 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4167643 [patent_doc_number] => 06065125 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'SMM power management circuits, systems, and methods' [patent_app_type] => 1 [patent_app_number] => 8/741876 [patent_app_country] => US [patent_app_date] => 1996-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3246 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/065/06065125.pdf [firstpage_image] =>[orig_patent_app_number] => 741876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4031809 [patent_doc_number] => 05881300 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Method and system for saving power in a computer system having a communication device' [patent_app_type] => 1 [patent_app_number] => 8/738782 [patent_app_country] => US [patent_app_date] => 1996-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5211 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881300.pdf [firstpage_image] =>[orig_patent_app_number] => 738782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4064770 [patent_doc_number] => 05870573 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Transistor switch used to isolate bus devices and/or translate bus voltage levels' [patent_app_type] => 1 [patent_app_number] => 8/733483 [patent_app_country] => US [patent_app_date] => 1996-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6311 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/870/05870573.pdf [firstpage_image] =>[orig_patent_app_number] => 733483 [rel_patent_id] =>[rel_patent_doc_number] =>)