
Shawn Riley
Examiner (ID: 12343)
| Most Active Art Unit | 2838 |
| Art Unit(s) | 2102, 2111, 2504, 2838 |
| Total Applications | 2083 |
| Issued Applications | 1947 |
| Pending Applications | 7 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3455045
[patent_doc_number] => 05388133
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-07
[patent_title] => 'Counter for attribute storage for use in a repeater'
[patent_app_type] => 1
[patent_app_number] => 8/020490
[patent_app_country] => US
[patent_app_date] => 1993-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1954
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/388/05388133.pdf
[firstpage_image] =>[orig_patent_app_number] => 020490
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/020490 | Counter for attribute storage for use in a repeater | Feb 21, 1993 | Issued |
Array
(
[id] => 3043698
[patent_doc_number] => 05376836
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-27
[patent_title] => 'ECL latch circuit with second current path for reset means'
[patent_app_type] => 1
[patent_app_number] => 8/017107
[patent_app_country] => US
[patent_app_date] => 1993-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 5234
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/376/05376836.pdf
[firstpage_image] =>[orig_patent_app_number] => 017107
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/017107 | ECL latch circuit with second current path for reset means | Feb 11, 1993 | Issued |
Array
(
[id] => 3023326
[patent_doc_number] => 05302860
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-12
[patent_title] => 'Circuit arrangement for automatic gain control'
[patent_app_type] => 1
[patent_app_number] => 8/015719
[patent_app_country] => US
[patent_app_date] => 1993-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 1793
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/302/05302860.pdf
[firstpage_image] =>[orig_patent_app_number] => 015719
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/015719 | Circuit arrangement for automatic gain control | Feb 8, 1993 | Issued |
Array
(
[id] => 3101011
[patent_doc_number] => 05298817
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-29
[patent_title] => 'High-frequency solid-state relay'
[patent_app_type] => 1
[patent_app_number] => 8/015482
[patent_app_country] => US
[patent_app_date] => 1993-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1237
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/298/05298817.pdf
[firstpage_image] =>[orig_patent_app_number] => 015482
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/015482 | High-frequency solid-state relay | Feb 8, 1993 | Issued |
| 08/013005 | SERVO GATE | Feb 2, 1993 | Abandoned |
Array
(
[id] => 3000252
[patent_doc_number] => 05363000
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-08
[patent_title] => 'Solid-state image sensing apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/012575
[patent_app_country] => US
[patent_app_date] => 1993-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2804
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/363/05363000.pdf
[firstpage_image] =>[orig_patent_app_number] => 012575
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/012575 | Solid-state image sensing apparatus | Feb 2, 1993 | Issued |
Array
(
[id] => 3041395
[patent_doc_number] => 05373201
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-13
[patent_title] => 'Power transistor'
[patent_app_type] => 1
[patent_app_number] => 8/012195
[patent_app_country] => US
[patent_app_date] => 1993-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1476
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/373/05373201.pdf
[firstpage_image] =>[orig_patent_app_number] => 012195
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/012195 | Power transistor | Feb 1, 1993 | Issued |
Array
(
[id] => 3014872
[patent_doc_number] => 05276359
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-01-04
[patent_title] => 'Current-input type interface circuit of a mouse'
[patent_app_type] => 1
[patent_app_number] => 8/012323
[patent_app_country] => US
[patent_app_date] => 1993-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2247
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 381
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/276/05276359.pdf
[firstpage_image] =>[orig_patent_app_number] => 012323
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/012323 | Current-input type interface circuit of a mouse | Feb 1, 1993 | Issued |
Array
(
[id] => 3083572
[patent_doc_number] => 05337338
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-08-09
[patent_title] => 'Pulse density modulation circuit (parallel to serial) comparing in a nonsequential bit order'
[patent_app_type] => 1
[patent_app_number] => 8/011618
[patent_app_country] => US
[patent_app_date] => 1993-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 4805
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/337/05337338.pdf
[firstpage_image] =>[orig_patent_app_number] => 011618
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/011618 | Pulse density modulation circuit (parallel to serial) comparing in a nonsequential bit order | Jan 31, 1993 | Issued |
| 08/009468 | CIRCUIT ARRANGEMENT FOR REGULATING SIGNALS | Jan 25, 1993 | Abandoned |
Array
(
[id] => 3052190
[patent_doc_number] => 05304857
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-19
[patent_title] => 'Pulse generating circuit for semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/009178
[patent_app_country] => US
[patent_app_date] => 1993-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2652
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 292
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/304/05304857.pdf
[firstpage_image] =>[orig_patent_app_number] => 009178
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/009178 | Pulse generating circuit for semiconductor device | Jan 25, 1993 | Issued |
Array
(
[id] => 3053772
[patent_doc_number] => 05304941
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-19
[patent_title] => 'Sensor detection signal extracting circuit with offset voltage cancelling ability'
[patent_app_type] => 1
[patent_app_number] => 8/001794
[patent_app_country] => US
[patent_app_date] => 1993-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2993
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/304/05304941.pdf
[firstpage_image] =>[orig_patent_app_number] => 001794
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/001794 | Sensor detection signal extracting circuit with offset voltage cancelling ability | Jan 7, 1993 | Issued |
Array
(
[id] => 3083894
[patent_doc_number] => 05321313
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-14
[patent_title] => 'Controlled power MOSFET switch-off circuit'
[patent_app_type] => 1
[patent_app_number] => 8/001475
[patent_app_country] => US
[patent_app_date] => 1993-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3999
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/321/05321313.pdf
[firstpage_image] =>[orig_patent_app_number] => 001475
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/001475 | Controlled power MOSFET switch-off circuit | Jan 6, 1993 | Issued |
Array
(
[id] => 3097554
[patent_doc_number] => 05313107
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-17
[patent_title] => 'Booster device'
[patent_app_type] => 1
[patent_app_number] => 7/994824
[patent_app_country] => US
[patent_app_date] => 1992-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1960
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/313/05313107.pdf
[firstpage_image] =>[orig_patent_app_number] => 994824
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/994824 | Booster device | Dec 21, 1992 | Issued |
Array
(
[id] => 3447781
[patent_doc_number] => 05467010
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-14
[patent_title] => 'Voltage regulator control circuit'
[patent_app_type] => 1
[patent_app_number] => 7/991884
[patent_app_country] => US
[patent_app_date] => 1992-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4935
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/467/05467010.pdf
[firstpage_image] =>[orig_patent_app_number] => 991884
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/991884 | Voltage regulator control circuit | Dec 16, 1992 | Issued |
Array
(
[id] => 3070396
[patent_doc_number] => 05352938
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-10-04
[patent_title] => 'Analog to digital signal conversion'
[patent_app_type] => 1
[patent_app_number] => 7/993764
[patent_app_country] => US
[patent_app_date] => 1992-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6048
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/352/05352938.pdf
[firstpage_image] =>[orig_patent_app_number] => 993764
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/993764 | Analog to digital signal conversion | Dec 13, 1992 | Issued |
Array
(
[id] => 3063470
[patent_doc_number] => 05307403
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-26
[patent_title] => 'Telephone branch line transmission circuit with blocking capacitor'
[patent_app_type] => 1
[patent_app_number] => 7/989623
[patent_app_country] => US
[patent_app_date] => 1992-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3430
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 346
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/307/05307403.pdf
[firstpage_image] =>[orig_patent_app_number] => 989623
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/989623 | Telephone branch line transmission circuit with blocking capacitor | Dec 13, 1992 | Issued |
Array
(
[id] => 3489002
[patent_doc_number] => 05400239
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-03-21
[patent_title] => 'Power converter with plural regulated outputs'
[patent_app_type] => 1
[patent_app_number] => 7/989588
[patent_app_country] => US
[patent_app_date] => 1992-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 4575
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/400/05400239.pdf
[firstpage_image] =>[orig_patent_app_number] => 989588
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/989588 | Power converter with plural regulated outputs | Dec 10, 1992 | Issued |
Array
(
[id] => 3461820
[patent_doc_number] => 05402058
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-03-28
[patent_title] => 'Method and apparatus for controlling discharge of a thyristor-switched capacitor'
[patent_app_type] => 1
[patent_app_number] => 7/987688
[patent_app_country] => US
[patent_app_date] => 1992-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 16
[patent_no_of_words] => 3925
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/402/05402058.pdf
[firstpage_image] =>[orig_patent_app_number] => 987688
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/987688 | Method and apparatus for controlling discharge of a thyristor-switched capacitor | Dec 8, 1992 | Issued |
Array
(
[id] => 3127840
[patent_doc_number] => 05450306
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-12
[patent_title] => 'Closed loop pulse width modulator inverter with volt-seconds feedback control'
[patent_app_type] => 1
[patent_app_number] => 7/987498
[patent_app_country] => US
[patent_app_date] => 1992-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4542
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/450/05450306.pdf
[firstpage_image] =>[orig_patent_app_number] => 987498
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/987498 | Closed loop pulse width modulator inverter with volt-seconds feedback control | Dec 6, 1992 | Issued |