Search

Shawn X. Gu

Examiner (ID: 12057, Phone: (571)272-0703 , Office: P/2138 )

Most Active Art Unit
2138
Art Unit(s)
2188, 2138, 2189
Total Applications
1301
Issued Applications
1187
Pending Applications
49
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8291522 [patent_doc_number] => 20120179853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'MEMORY ADDRESS TRANSLATION' [patent_app_type] => utility [patent_app_number] => 12/985787 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5577 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12985787 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985787
Memory address translation Jan 5, 2011 Issued
Array ( [id] => 8143347 [patent_doc_number] => 20120096220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'BIT WEAVING TECHNIQUE FOR COMPRESSING PACKET CLASSIFIERS' [patent_app_type] => utility [patent_app_number] => 12/985407 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8344 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20120096220.pdf [firstpage_image] =>[orig_patent_app_number] => 12985407 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985407
Bit weaving technique for compressing packet classifiers Jan 5, 2011 Issued
Array ( [id] => 5990498 [patent_doc_number] => 20110099341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'SYSTEM, APPARATUS, AND METHOD FOR MODIFYING THE ORDER OF MEMORY ACCESSES' [patent_app_type] => utility [patent_app_number] => 12/984711 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7402 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20110099341.pdf [firstpage_image] =>[orig_patent_app_number] => 12984711 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/984711
System, apparatus, and method for modifying the order of memory accesses Jan 4, 2011 Issued
Array ( [id] => 8267310 [patent_doc_number] => 20120166738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'MANAGING SHARED DATA OBJECTS TO PROVIDE VISIBILITY TO SHARED MEMORY' [patent_app_type] => utility [patent_app_number] => 12/979505 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5063 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12979505 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/979505
Managing shared data objects to provide visibility to shared memory Dec 27, 2010 Issued
Array ( [id] => 7759734 [patent_doc_number] => 20120030412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'Systems and Methods for Implementing a Programming Sequence to Enhance Die Interleave' [patent_app_type] => utility [patent_app_number] => 12/979686 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6326 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20120030412.pdf [firstpage_image] =>[orig_patent_app_number] => 12979686 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/979686
Systems and methods for implementing a programming sequence to enhance die interleave Dec 27, 2010 Issued
Array ( [id] => 9257713 [patent_doc_number] => 08621153 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Microcode refactoring and caching' [patent_app_type] => utility [patent_app_number] => 12/978583 [patent_app_country] => US [patent_app_date] => 2010-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5538 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12978583 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/978583
Microcode refactoring and caching Dec 25, 2010 Issued
Array ( [id] => 8443440 [patent_doc_number] => 20120260057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-11 [patent_title] => 'COUNTER ARCHITECTURE FOR ONLINE DVFS PROFITABILITY ESTIMATION' [patent_app_type] => utility [patent_app_number] => 13/516850 [patent_app_country] => US [patent_app_date] => 2010-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11285 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13516850 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/516850
Counter architecture for online DVFS profitability estimation Dec 9, 2010 Issued
Array ( [id] => 8971702 [patent_doc_number] => 08510530 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-13 [patent_title] => 'Memory management for programs operating asynchronously' [patent_app_type] => utility [patent_app_number] => 12/963740 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5092 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963740 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/963740
Memory management for programs operating asynchronously Dec 8, 2010 Issued
Array ( [id] => 9680428 [patent_doc_number] => 08819355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Information processing apparatus, information processing method, and program' [patent_app_type] => utility [patent_app_number] => 13/514792 [patent_app_country] => US [patent_app_date] => 2010-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8621 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13514792 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/514792
Information processing apparatus, information processing method, and program Nov 10, 2010 Issued
Array ( [id] => 4636914 [patent_doc_number] => 08015377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'Method and apparatus for de-duplication after mirror operation' [patent_app_type] => utility [patent_app_number] => 12/938823 [patent_app_country] => US [patent_app_date] => 2010-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 34 [patent_no_of_words] => 13612 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/015/08015377.pdf [firstpage_image] =>[orig_patent_app_number] => 12938823 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/938823
Method and apparatus for de-duplication after mirror operation Nov 2, 2010 Issued
Array ( [id] => 6073501 [patent_doc_number] => 20110047327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'SEARCHING A CONTENT ADDRESSABLE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/913050 [patent_app_country] => US [patent_app_date] => 2010-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4200 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20110047327.pdf [firstpage_image] =>[orig_patent_app_number] => 12913050 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/913050
Searching a content addressable memory with modifiable comparands Oct 26, 2010 Issued
Array ( [id] => 8872922 [patent_doc_number] => 08468309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Optimized ring protocols and techniques' [patent_app_type] => utility [patent_app_number] => 12/890650 [patent_app_country] => US [patent_app_date] => 2010-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5634 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12890650 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/890650
Optimized ring protocols and techniques Sep 24, 2010 Issued
Array ( [id] => 8058977 [patent_doc_number] => 20120079214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'ALLOCATION AND WRITE POLICY FOR A GLUELESS AREA-EFFICIENT DIRECTORY CACHE FOR HOTLY CONTESTED CACHE LINES' [patent_app_type] => utility [patent_app_number] => 12/890649 [patent_app_country] => US [patent_app_date] => 2010-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5976 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20120079214.pdf [firstpage_image] =>[orig_patent_app_number] => 12890649 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/890649
Allocation and write policy for a glueless area-efficient directory cache for hotly contested cache lines Sep 24, 2010 Issued
Array ( [id] => 9257721 [patent_doc_number] => 08621161 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-31 [patent_title] => 'Moving data between data stores' [patent_app_type] => utility [patent_app_number] => 12/888731 [patent_app_country] => US [patent_app_date] => 2010-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11283 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12888731 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/888731
Moving data between data stores Sep 22, 2010 Issued
Array ( [id] => 8058963 [patent_doc_number] => 20120079212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'ARCHITECTURE FOR SHARING CACHES AMONG MULTIPLE PROCESSES' [patent_app_type] => utility [patent_app_number] => 12/888883 [patent_app_country] => US [patent_app_date] => 2010-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6793 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20120079212.pdf [firstpage_image] =>[orig_patent_app_number] => 12888883 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/888883
ARCHITECTURE FOR SHARING CACHES AMONG MULTIPLE PROCESSES Sep 22, 2010 Abandoned
Array ( [id] => 8971701 [patent_doc_number] => 08510529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-13 [patent_title] => 'Method for generating program and method for operating system' [patent_app_type] => utility [patent_app_number] => 12/888614 [patent_app_country] => US [patent_app_date] => 2010-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 57 [patent_no_of_words] => 23568 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12888614 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/888614
Method for generating program and method for operating system Sep 22, 2010 Issued
Array ( [id] => 9532484 [patent_doc_number] => 08756370 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-06-17 [patent_title] => 'Non-disruptive drive firmware upgrades' [patent_app_type] => utility [patent_app_number] => 12/888943 [patent_app_country] => US [patent_app_date] => 2010-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 7710 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12888943 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/888943
Non-disruptive drive firmware upgrades Sep 22, 2010 Issued
Array ( [id] => 7694980 [patent_doc_number] => 20110231610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/884844 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12013 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20110231610.pdf [firstpage_image] =>[orig_patent_app_number] => 12884844 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884844
Memory system comprising blocks operable in parallel Sep 16, 2010 Issued
Array ( [id] => 6073870 [patent_doc_number] => 20110047437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'APPARATUS, SYSTEM, AND METHOD FOR GRACEFUL CACHE DEVICE DEGRADATION' [patent_app_type] => utility [patent_app_number] => 12/885285 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 16120 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20110047437.pdf [firstpage_image] =>[orig_patent_app_number] => 12885285 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/885285
Apparatus, system, and method for graceful cache device degradation Sep 16, 2010 Issued
Array ( [id] => 6057253 [patent_doc_number] => 20110113187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/884590 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13084 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20110113187.pdf [firstpage_image] =>[orig_patent_app_number] => 12884590 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884590
SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING THE SAME Sep 16, 2010 Abandoned
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