Search

Shawn X. Gu

Examiner (ID: 12057, Phone: (571)272-0703 , Office: P/2138 )

Most Active Art Unit
2138
Art Unit(s)
2188, 2138, 2189
Total Applications
1301
Issued Applications
1187
Pending Applications
49
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6104871 [patent_doc_number] => 20110167228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-07 [patent_title] => 'MEMORY DEVICE AND MEMORY DEVICE CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 12/808868 [patent_app_country] => US [patent_app_date] => 2008-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14631 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20110167228.pdf [firstpage_image] =>[orig_patent_app_number] => 12808868 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/808868
Memory device and memory device control method Dec 17, 2008 Issued
Array ( [id] => 5548075 [patent_doc_number] => 20090157952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'Semiconductor memory system and wear-leveling method thereof' [patent_app_type] => utility [patent_app_number] => 12/316508 [patent_app_country] => US [patent_app_date] => 2008-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6368 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20090157952.pdf [firstpage_image] =>[orig_patent_app_number] => 12316508 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/316508
Semiconductor memory system and wear-leveling method thereof Dec 11, 2008 Issued
Array ( [id] => 5504035 [patent_doc_number] => 20090164723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'Memory card' [patent_app_type] => utility [patent_app_number] => 12/314600 [patent_app_country] => US [patent_app_date] => 2008-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3706 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20090164723.pdf [firstpage_image] =>[orig_patent_app_number] => 12314600 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/314600
Memory card with removable cover Dec 11, 2008 Issued
Array ( [id] => 4631833 [patent_doc_number] => 08010743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-30 [patent_title] => 'Automatic raid volume generation and migration based on application type' [patent_app_type] => utility [patent_app_number] => 12/333327 [patent_app_country] => US [patent_app_date] => 2008-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/010/08010743.pdf [firstpage_image] =>[orig_patent_app_number] => 12333327 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333327
Automatic raid volume generation and migration based on application type Dec 11, 2008 Issued
Array ( [id] => 6448050 [patent_doc_number] => 20100153634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'SYSTEM AND METHOD FOR DATA MIGRATION BETWEEN COMPUTER CLUSTER ARCHITECTURE AND DATA STORAGE DEVICES' [patent_app_type] => utility [patent_app_number] => 12/333769 [patent_app_country] => US [patent_app_date] => 2008-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6575 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20100153634.pdf [firstpage_image] =>[orig_patent_app_number] => 12333769 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333769
System and method for data migration between computer cluster architecture and data storage devices Dec 11, 2008 Issued
Array ( [id] => 4478979 [patent_doc_number] => 07945733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-17 [patent_title] => 'Hierarchical storage management (HSM) for redundant array of independent disks (RAID)' [patent_app_type] => utility [patent_app_number] => 12/333329 [patent_app_country] => US [patent_app_date] => 2008-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2825 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/945/07945733.pdf [firstpage_image] =>[orig_patent_app_number] => 12333329 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333329
Hierarchical storage management (HSM) for redundant array of independent disks (RAID) Dec 11, 2008 Issued
Array ( [id] => 6447910 [patent_doc_number] => 20100153621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'METHODS, COMPUTER PROGRAM PRODUCTS, AND SYSTEMS FOR PROVIDING AN UPGRADEABLE HARD DISK' [patent_app_type] => utility [patent_app_number] => 12/333562 [patent_app_country] => US [patent_app_date] => 2008-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4827 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20100153621.pdf [firstpage_image] =>[orig_patent_app_number] => 12333562 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333562
Methods, computer program products, and systems for providing an upgradeable hard disk Dec 11, 2008 Issued
Array ( [id] => 7524972 [patent_doc_number] => 08028142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-27 [patent_title] => 'Controller of storage device, storage device, and control method of storage device' [patent_app_type] => utility [patent_app_number] => 12/333034 [patent_app_country] => US [patent_app_date] => 2008-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5236 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/028/08028142.pdf [firstpage_image] =>[orig_patent_app_number] => 12333034 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333034
Controller of storage device, storage device, and control method of storage device Dec 10, 2008 Issued
Array ( [id] => 6448344 [patent_doc_number] => 20100153661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'PROCESSING OF READ REQUESTS IN A MEMORY CONTROLLER USING PRE-FETCH MECHANISM' [patent_app_type] => utility [patent_app_number] => 12/333295 [patent_app_country] => US [patent_app_date] => 2008-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20100153661.pdf [firstpage_image] =>[orig_patent_app_number] => 12333295 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333295
Processing of read requests in a memory controller using pre-fetch mechanism Dec 10, 2008 Issued
Array ( [id] => 7718445 [patent_doc_number] => 08095764 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-01-10 [patent_title] => 'Dynamic application aware storage configuration' [patent_app_type] => utility [patent_app_number] => 12/333271 [patent_app_country] => US [patent_app_date] => 2008-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15959 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/095/08095764.pdf [firstpage_image] =>[orig_patent_app_number] => 12333271 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333271
Dynamic application aware storage configuration Dec 10, 2008 Issued
Array ( [id] => 9169720 [patent_doc_number] => 08595413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Memory control method and device, memory access control method, computer program, and recording medium' [patent_app_type] => utility [patent_app_number] => 12/867584 [patent_app_country] => US [patent_app_date] => 2008-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 26726 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12867584 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/867584
Memory control method and device, memory access control method, computer program, and recording medium Dec 8, 2008 Issued
Array ( [id] => 9940680 [patent_doc_number] => 08990511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Multiprocessor, cache synchronization control method and program therefor' [patent_app_type] => utility [patent_app_number] => 12/734421 [patent_app_country] => US [patent_app_date] => 2008-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11486 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12734421 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/734421
Multiprocessor, cache synchronization control method and program therefor Oct 30, 2008 Issued
Array ( [id] => 37478 [patent_doc_number] => 07793048 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-07 [patent_title] => 'System bus structure for large L2 cache array topology with different latency domains' [patent_app_type] => utility [patent_app_number] => 12/207445 [patent_app_country] => US [patent_app_date] => 2008-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 6724 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/793/07793048.pdf [firstpage_image] =>[orig_patent_app_number] => 12207445 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/207445
System bus structure for large L2 cache array topology with different latency domains Sep 8, 2008 Issued
Array ( [id] => 4636895 [patent_doc_number] => 08015358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'System bus structure for large L2 cache array topology with different latency domains' [patent_app_type] => utility [patent_app_number] => 12/207393 [patent_app_country] => US [patent_app_date] => 2008-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 6750 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/015/08015358.pdf [firstpage_image] =>[orig_patent_app_number] => 12207393 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/207393
System bus structure for large L2 cache array topology with different latency domains Sep 8, 2008 Issued
Array ( [id] => 4712851 [patent_doc_number] => 20080301377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'DATA PROCESSING SYSTEM, CACHE SYSTEM AND METHOD FOR UPDATING AN INVALID COHERENCY STATE IN RESPONSE TO SNOOPING AN OPERATION' [patent_app_type] => utility [patent_app_number] => 12/190766 [patent_app_country] => US [patent_app_date] => 2008-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14274 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0301/20080301377.pdf [firstpage_image] =>[orig_patent_app_number] => 12190766 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/190766
Updating an invalid coherency state in response to snooping an operation Aug 12, 2008 Issued
Array ( [id] => 4585655 [patent_doc_number] => 07856525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-21 [patent_title] => 'Content addressed storage device configured to maintain content address mapping' [patent_app_type] => utility [patent_app_number] => 12/217061 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3691 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/856/07856525.pdf [firstpage_image] =>[orig_patent_app_number] => 12217061 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/217061
Content addressed storage device configured to maintain content address mapping Jun 29, 2008 Issued
Array ( [id] => 4888940 [patent_doc_number] => 20080263272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'DATA STORAGE MANAGEMENT METHOD' [patent_app_type] => utility [patent_app_number] => 12/144742 [patent_app_country] => US [patent_app_date] => 2008-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2803 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20080263272.pdf [firstpage_image] =>[orig_patent_app_number] => 12144742 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/144742
Data storage management method for selectively controlling reutilization of space in a virtual tape system Jun 23, 2008 Issued
Array ( [id] => 4722169 [patent_doc_number] => 20080244121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'METHOD AND APPARATUS FOR MEMORY COMPRESSION' [patent_app_type] => utility [patent_app_number] => 12/131904 [patent_app_country] => US [patent_app_date] => 2008-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 17194 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20080244121.pdf [firstpage_image] =>[orig_patent_app_number] => 12131904 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/131904
METHOD AND APPARATUS FOR MEMORY COMPRESSION Jun 1, 2008 Abandoned
Array ( [id] => 4472188 [patent_doc_number] => 07937555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Data processing system and computer program product to allow PCI host bridge (PHB) to handle pre-fetch read transactions on the PCI bus which access system memory through translation control entry (TCE) table' [patent_app_type] => utility [patent_app_number] => 12/105113 [patent_app_country] => US [patent_app_date] => 2008-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4386 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/937/07937555.pdf [firstpage_image] =>[orig_patent_app_number] => 12105113 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/105113
Data processing system and computer program product to allow PCI host bridge (PHB) to handle pre-fetch read transactions on the PCI bus which access system memory through translation control entry (TCE) table Apr 16, 2008 Issued
Array ( [id] => 4678190 [patent_doc_number] => 20080215821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'DATA PROCESSING SYSTEM AND METHOD FOR EFFICIENT COMMUNICATION UTILIZING AN IN COHERENCY STATE' [patent_app_type] => utility [patent_app_number] => 12/103564 [patent_app_country] => US [patent_app_date] => 2008-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 30802 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20080215821.pdf [firstpage_image] =>[orig_patent_app_number] => 12103564 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/103564
Data processing system and method for efficient communication utilizing an in coherency state Apr 14, 2008 Issued
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