Search

Shawn X. Gu

Examiner (ID: 12057, Phone: (571)272-0703 , Office: P/2138 )

Most Active Art Unit
2138
Art Unit(s)
2188, 2138, 2189
Total Applications
1301
Issued Applications
1187
Pending Applications
49
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 633359 [patent_doc_number] => 07133993 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-11-07 [patent_title] => 'Inferring size of a processor memory address based on pointer usage' [patent_app_type] => utility [patent_app_number] => 10/753051 [patent_app_country] => US [patent_app_date] => 2004-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5906 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/133/07133993.pdf [firstpage_image] =>[orig_patent_app_number] => 10753051 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/753051
Inferring size of a processor memory address based on pointer usage Jan 5, 2004 Issued
Array ( [id] => 582052 [patent_doc_number] => 07162591 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-01-09 [patent_title] => 'Processor memory having a dedicated port' [patent_app_type] => utility [patent_app_number] => 10/753052 [patent_app_country] => US [patent_app_date] => 2004-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5836 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/162/07162591.pdf [firstpage_image] =>[orig_patent_app_number] => 10753052 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/753052
Processor memory having a dedicated port Jan 5, 2004 Issued
Array ( [id] => 774136 [patent_doc_number] => 07007144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-28 [patent_title] => 'Method, apparatus, and computer readable medium for managing back-up' [patent_app_type] => utility [patent_app_number] => 10/743737 [patent_app_country] => US [patent_app_date] => 2003-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 6584 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/007/07007144.pdf [firstpage_image] =>[orig_patent_app_number] => 10743737 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/743737
Method, apparatus, and computer readable medium for managing back-up Dec 23, 2003 Issued
Array ( [id] => 856248 [patent_doc_number] => 07380086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-27 [patent_title] => 'Scalable runtime system for global address space languages on shared and distributed memory machines' [patent_app_type] => utility [patent_app_number] => 10/734690 [patent_app_country] => US [patent_app_date] => 2003-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3766 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/380/07380086.pdf [firstpage_image] =>[orig_patent_app_number] => 10734690 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/734690
Scalable runtime system for global address space languages on shared and distributed memory machines Dec 11, 2003 Issued
Array ( [id] => 7100352 [patent_doc_number] => 20050132178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Removable flash backup for storage controllers' [patent_app_type] => utility [patent_app_number] => 10/735160 [patent_app_country] => US [patent_app_date] => 2003-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3071 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20050132178.pdf [firstpage_image] =>[orig_patent_app_number] => 10735160 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/735160
Removable flash backup for storage controllers Dec 11, 2003 Abandoned
Array ( [id] => 548453 [patent_doc_number] => 07185147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-27 [patent_title] => 'Striping across multiple cache lines to prevent false sharing' [patent_app_type] => utility [patent_app_number] => 10/735113 [patent_app_country] => US [patent_app_date] => 2003-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3941 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/185/07185147.pdf [firstpage_image] =>[orig_patent_app_number] => 10735113 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/735113
Striping across multiple cache lines to prevent false sharing Dec 11, 2003 Issued
Array ( [id] => 7259842 [patent_doc_number] => 20050076157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-07 [patent_title] => 'Storage system' [patent_app_type] => utility [patent_app_number] => 10/735155 [patent_app_country] => US [patent_app_date] => 2003-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 12295 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20050076157.pdf [firstpage_image] =>[orig_patent_app_number] => 10735155 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/735155
Storage system Dec 11, 2003 Issued
Array ( [id] => 5592258 [patent_doc_number] => 20060041711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'Memory module, memory system, and information device' [patent_app_type] => utility [patent_app_number] => 10/536460 [patent_app_country] => US [patent_app_date] => 2003-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 21335 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20060041711.pdf [firstpage_image] =>[orig_patent_app_number] => 10536460 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/536460
Memory module, memory system, and information device Nov 26, 2003 Issued
Array ( [id] => 562111 [patent_doc_number] => 07165143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-16 [patent_title] => 'System and method for manipulating cache data' [patent_app_type] => utility [patent_app_number] => 10/733896 [patent_app_country] => US [patent_app_date] => 2003-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8279 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/165/07165143.pdf [firstpage_image] =>[orig_patent_app_number] => 10733896 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/733896
System and method for manipulating cache data Nov 25, 2003 Issued
Array ( [id] => 7293391 [patent_doc_number] => 20040111561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'System and method for managing a cache memory' [patent_app_type] => new [patent_app_number] => 10/724470 [patent_app_country] => US [patent_app_date] => 2003-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8334 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20040111561.pdf [firstpage_image] =>[orig_patent_app_number] => 10724470 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/724470
System and method for managing a cache memory Nov 25, 2003 Issued
Array ( [id] => 7293442 [patent_doc_number] => 20040111588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'System and method for managing a cache memory' [patent_app_type] => new [patent_app_number] => 10/724472 [patent_app_country] => US [patent_app_date] => 2003-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8334 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20040111588.pdf [firstpage_image] =>[orig_patent_app_number] => 10724472 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/724472
System and method for managing a cache memory Nov 25, 2003 Issued
Array ( [id] => 7246534 [patent_doc_number] => 20040158687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Distributed raid and location independence caching system' [patent_app_type] => new [patent_app_number] => 10/693077 [patent_app_country] => US [patent_app_date] => 2003-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2281 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20040158687.pdf [firstpage_image] =>[orig_patent_app_number] => 10693077 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/693077
Distributed raid and location independence caching system Oct 23, 2003 Abandoned
Array ( [id] => 641066 [patent_doc_number] => 07127547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-24 [patent_title] => 'Processor with multiple linked list storage feature' [patent_app_type] => utility [patent_app_number] => 10/675717 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4468 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/127/07127547.pdf [firstpage_image] =>[orig_patent_app_number] => 10675717 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/675717
Processor with multiple linked list storage feature Sep 29, 2003 Issued
Array ( [id] => 679984 [patent_doc_number] => 07089370 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'Apparatus and method for pre-fetching page data using segment table data' [patent_app_type] => utility [patent_app_number] => 10/675170 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 15570 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/089/07089370.pdf [firstpage_image] =>[orig_patent_app_number] => 10675170 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/675170
Apparatus and method for pre-fetching page data using segment table data Sep 29, 2003 Issued
Array ( [id] => 7605723 [patent_doc_number] => 07099999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-29 [patent_title] => 'Apparatus and method for pre-fetching data to cached memory using persistent historical page table data' [patent_app_type] => utility [patent_app_number] => 10/675732 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 15594 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/099/07099999.pdf [firstpage_image] =>[orig_patent_app_number] => 10675732 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/675732
Apparatus and method for pre-fetching data to cached memory using persistent historical page table data Sep 29, 2003 Issued
Array ( [id] => 7013488 [patent_doc_number] => 20050066130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Multilevel segmented memory' [patent_app_type] => utility [patent_app_number] => 10/668713 [patent_app_country] => US [patent_app_date] => 2003-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4106 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20050066130.pdf [firstpage_image] =>[orig_patent_app_number] => 10668713 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/668713
Multilevel segmented memory Sep 22, 2003 Issued
Array ( [id] => 7013669 [patent_doc_number] => 20050066222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Systems and methods for time dependent data storage and recovery' [patent_app_type] => utility [patent_app_number] => 10/668833 [patent_app_country] => US [patent_app_date] => 2003-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 20823 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20050066222.pdf [firstpage_image] =>[orig_patent_app_number] => 10668833 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/668833
Systems and methods for time dependent data storage and recovery Sep 22, 2003 Issued
Array ( [id] => 8170564 [patent_doc_number] => 08176250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-08 [patent_title] => 'System and method for testing a memory' [patent_app_type] => utility [patent_app_number] => 10/652536 [patent_app_country] => US [patent_app_date] => 2003-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3859 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/176/08176250.pdf [firstpage_image] =>[orig_patent_app_number] => 10652536 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/652536
System and method for testing a memory Aug 28, 2003 Issued
Array ( [id] => 659276 [patent_doc_number] => 07111113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-19 [patent_title] => 'Apparatus and method to write information to and/or read information from an information storage medium' [patent_app_type] => utility [patent_app_number] => 10/652162 [patent_app_country] => US [patent_app_date] => 2003-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12191 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/111/07111113.pdf [firstpage_image] =>[orig_patent_app_number] => 10652162 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/652162
Apparatus and method to write information to and/or read information from an information storage medium Aug 28, 2003 Issued
Array ( [id] => 7160616 [patent_doc_number] => 20050028039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Method and apparatus for coordinating dynamic memory deallocation with a redundant bit line steering mechanism' [patent_app_type] => utility [patent_app_number] => 10/631067 [patent_app_country] => US [patent_app_date] => 2003-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7325 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20050028039.pdf [firstpage_image] =>[orig_patent_app_number] => 10631067 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/631067
Method and apparatus for coordinating dynamic memory deallocation with a redundant bit line steering mechanism Jul 30, 2003 Issued
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