
Shawntina T. Fuqua
Examiner (ID: 5212, Phone: (571)272-4779 , Office: P/3742 )
| Most Active Art Unit | 3742 |
| Art Unit(s) | 3742, 3761 |
| Total Applications | 2140 |
| Issued Applications | 1705 |
| Pending Applications | 63 |
| Abandoned Applications | 375 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1097515
[patent_doc_number] => 06822332
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-23
[patent_title] => 'Fine line circuitization'
[patent_app_type] => B2
[patent_app_number] => 10/253439
[patent_app_country] => US
[patent_app_date] => 2002-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5005
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/822/06822332.pdf
[firstpage_image] =>[orig_patent_app_number] => 10253439
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/253439 | Fine line circuitization | Sep 22, 2002 | Issued |
Array
(
[id] => 999820
[patent_doc_number] => 06911671
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-28
[patent_title] => 'Device for depositing patterned layers in OLED displays'
[patent_app_type] => utility
[patent_app_number] => 10/252639
[patent_app_country] => US
[patent_app_date] => 2002-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 19
[patent_no_of_words] => 16585
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/911/06911671.pdf
[firstpage_image] =>[orig_patent_app_number] => 10252639
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/252639 | Device for depositing patterned layers in OLED displays | Sep 22, 2002 | Issued |
Array
(
[id] => 495642
[patent_doc_number] => 07211828
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-05-01
[patent_title] => 'Light emitting device and electronic apparatus'
[patent_app_type] => utility
[patent_app_number] => 10/235839
[patent_app_country] => US
[patent_app_date] => 2002-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 32
[patent_no_of_words] => 13729
[patent_no_of_claims] => 57
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/211/07211828.pdf
[firstpage_image] =>[orig_patent_app_number] => 10235839
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/235839 | Light emitting device and electronic apparatus | Sep 5, 2002 | Issued |
Array
(
[id] => 1034455
[patent_doc_number] => 06875664
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-04-05
[patent_title] => 'Formation of amorphous carbon ARC stack having graded transition between amorphous carbon and ARC material'
[patent_app_type] => utility
[patent_app_number] => 10/230794
[patent_app_country] => US
[patent_app_date] => 2002-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 5311
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/875/06875664.pdf
[firstpage_image] =>[orig_patent_app_number] => 10230794
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/230794 | Formation of amorphous carbon ARC stack having graded transition between amorphous carbon and ARC material | Aug 28, 2002 | Issued |
Array
(
[id] => 7619757
[patent_doc_number] => 06943428
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-09-13
[patent_title] => 'Semiconductor device including bipolar transistor and buried conductive region'
[patent_app_type] => utility
[patent_app_number] => 10/229138
[patent_app_country] => US
[patent_app_date] => 2002-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 19
[patent_no_of_words] => 6304
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/943/06943428.pdf
[firstpage_image] =>[orig_patent_app_number] => 10229138
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/229138 | Semiconductor device including bipolar transistor and buried conductive region | Aug 27, 2002 | Issued |
Array
(
[id] => 712145
[patent_doc_number] => 07057215
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-06-06
[patent_title] => 'PMOS based LVTSCR and IGBT-like structure'
[patent_app_type] => utility
[patent_app_number] => 10/210948
[patent_app_country] => US
[patent_app_date] => 2002-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2683
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/057/07057215.pdf
[firstpage_image] =>[orig_patent_app_number] => 10210948
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/210948 | PMOS based LVTSCR and IGBT-like structure | Aug 1, 2002 | Issued |
Array
(
[id] => 7388088
[patent_doc_number] => 20040016930
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-29
[patent_title] => 'Electronic device and supporting member'
[patent_app_type] => new
[patent_app_number] => 10/205592
[patent_app_country] => US
[patent_app_date] => 2002-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 10169
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0016/20040016930.pdf
[firstpage_image] =>[orig_patent_app_number] => 10205592
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/205592 | Electronic device with integrally formed light emitting device and supporting member | Jul 24, 2002 | Issued |
Array
(
[id] => 6385231
[patent_doc_number] => 20020179985
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-05
[patent_title] => 'Flexible silicon strain gage'
[patent_app_type] => new
[patent_app_number] => 10/191176
[patent_app_country] => US
[patent_app_date] => 2002-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3989
[patent_no_of_claims] => 51
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20020179985.pdf
[firstpage_image] =>[orig_patent_app_number] => 10191176
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/191176 | Flexible silicon strain gage | Jul 8, 2002 | Abandoned |
Array
(
[id] => 6638887
[patent_doc_number] => 20030006829
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-09
[patent_title] => 'Power device with integrated voltage stabilizing circuit and method for manufacturing the device'
[patent_app_type] => new
[patent_app_number] => 10/189019
[patent_app_country] => US
[patent_app_date] => 2002-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4217
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0006/20030006829.pdf
[firstpage_image] =>[orig_patent_app_number] => 10189019
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/189019 | Power device with integrated voltage stabilizing circuit and method for manufacturing the device | Jul 4, 2002 | Abandoned |
Array
(
[id] => 1144790
[patent_doc_number] => 06777775
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-17
[patent_title] => 'Semiconductor integrated circuit, D-A converter device, and A-D converter device'
[patent_app_type] => B2
[patent_app_number] => 10/187378
[patent_app_country] => US
[patent_app_date] => 2002-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 16
[patent_no_of_words] => 6311
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/777/06777775.pdf
[firstpage_image] =>[orig_patent_app_number] => 10187378
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/187378 | Semiconductor integrated circuit, D-A converter device, and A-D converter device | Jul 1, 2002 | Issued |
Array
(
[id] => 6635883
[patent_doc_number] => 20030006497
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-09
[patent_title] => 'Semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/187369
[patent_app_country] => US
[patent_app_date] => 2002-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4570
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0006/20030006497.pdf
[firstpage_image] =>[orig_patent_app_number] => 10187369
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/187369 | Semiconductor device having junction-termination structure of resurf type | Jul 1, 2002 | Issued |
Array
(
[id] => 988410
[patent_doc_number] => 06921965
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-07-26
[patent_title] => 'Die surface magnetic field shield'
[patent_app_type] => utility
[patent_app_number] => 10/175628
[patent_app_country] => US
[patent_app_date] => 2002-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 27
[patent_no_of_words] => 10049
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/921/06921965.pdf
[firstpage_image] =>[orig_patent_app_number] => 10175628
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/175628 | Die surface magnetic field shield | Jun 19, 2002 | Issued |
Array
(
[id] => 1306295
[patent_doc_number] => 06621171
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-09-16
[patent_title] => 'Semiconductor device having a wire laid between pads'
[patent_app_type] => B2
[patent_app_number] => 10/171599
[patent_app_country] => US
[patent_app_date] => 2002-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 3988
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/621/06621171.pdf
[firstpage_image] =>[orig_patent_app_number] => 10171599
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/171599 | Semiconductor device having a wire laid between pads | Jun 16, 2002 | Issued |
Array
(
[id] => 6803386
[patent_doc_number] => 20030230780
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-18
[patent_title] => 'Fully silicided NMOS device for electrostatic discharge protection'
[patent_app_type] => new
[patent_app_number] => 10/170248
[patent_app_country] => US
[patent_app_date] => 2002-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2780
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0230/20030230780.pdf
[firstpage_image] =>[orig_patent_app_number] => 10170248
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/170248 | Fully silicided NMOS device for electrostatic discharge protection | Jun 11, 2002 | Issued |
Array
(
[id] => 1097466
[patent_doc_number] => 06822314
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-23
[patent_title] => 'Base for a NPN bipolar transistor'
[patent_app_type] => B2
[patent_app_number] => 10/171349
[patent_app_country] => US
[patent_app_date] => 2002-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3053
[patent_no_of_claims] => 13
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/822/06822314.pdf
[firstpage_image] =>[orig_patent_app_number] => 10171349
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/171349 | Base for a NPN bipolar transistor | Jun 11, 2002 | Issued |
Array
(
[id] => 6493711
[patent_doc_number] => 20020190266
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-19
[patent_title] => 'Semiconductor package having a resin cap member'
[patent_app_type] => new
[patent_app_number] => 10/166668
[patent_app_country] => US
[patent_app_date] => 2002-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 3440
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0190/20020190266.pdf
[firstpage_image] =>[orig_patent_app_number] => 10166668
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/166668 | Semiconductor package having a resin cap member | Jun 11, 2002 | Issued |
Array
(
[id] => 1047303
[patent_doc_number] => 06864535
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-08
[patent_title] => 'Controllable semiconductor switching element that blocks in both directions'
[patent_app_type] => utility
[patent_app_number] => 10/164178
[patent_app_country] => US
[patent_app_date] => 2002-06-06
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/864/06864535.pdf
[firstpage_image] =>[orig_patent_app_number] => 10164178
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/164178 | Controllable semiconductor switching element that blocks in both directions | Jun 5, 2002 | Issued |
Array
(
[id] => 6316838
[patent_doc_number] => 20020195620
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-26
[patent_title] => 'Compound semiconductor device having heterojunction bipolar transister and other component integrated together and process for fabrication thereof'
[patent_app_type] => new
[patent_app_number] => 10/164093
[patent_app_country] => US
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0195/20020195620.pdf
[firstpage_image] =>[orig_patent_app_number] => 10164093
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/164093 | Compound semiconductor device having heterojunction bipolar transister and other component integrated together and process for fabrication thereof | Jun 4, 2002 | Abandoned |
Array
(
[id] => 931357
[patent_doc_number] => 06979861
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-12-27
[patent_title] => 'Power device having reduced reverse bias leakage current'
[patent_app_type] => utility
[patent_app_number] => 10/159558
[patent_app_country] => US
[patent_app_date] => 2002-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/979/06979861.pdf
[firstpage_image] =>[orig_patent_app_number] => 10159558
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/159558 | Power device having reduced reverse bias leakage current | May 29, 2002 | Issued |
Array
(
[id] => 1221796
[patent_doc_number] => 06703698
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-03-09
[patent_title] => 'Semiconductor package with enhanced electrical and thermal performance and method for fabricating the same'
[patent_app_type] => B2
[patent_app_number] => 10/157069
[patent_app_country] => US
[patent_app_date] => 2002-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3151
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 313
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/703/06703698.pdf
[firstpage_image] =>[orig_patent_app_number] => 10157069
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/157069 | Semiconductor package with enhanced electrical and thermal performance and method for fabricating the same | May 28, 2002 | Issued |