Search

Sheikh Maruf

Examiner (ID: 9095, Phone: (571)270-1903 , Office: P/2828 )

Most Active Art Unit
2828
Art Unit(s)
2828, 2823, 2897
Total Applications
855
Issued Applications
721
Pending Applications
70
Abandoned Applications
82

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15370123 [patent_doc_number] => 20200020826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/583773 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16583773 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/583773
Light emitting diode and method of manufacturing the same Sep 25, 2019 Issued
Array ( [id] => 15351447 [patent_doc_number] => 20200013615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => SELECTIVE GROWTH OF SIO2 ON DIELECTRIC SURFACES IN THE PRESENCE OF COPPER [patent_app_type] => utility [patent_app_number] => 16/575214 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11280 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575214 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/575214
Selective growth of SIO2 on dielectric surfaces in the presence of copper Sep 17, 2019 Issued
Array ( [id] => 15331481 [patent_doc_number] => 20200006070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => MATERIAL SELECTIVE REGROWTH STRUCTURE AND METHOD [patent_app_type] => utility [patent_app_number] => 16/568658 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2657 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568658 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568658
Material selective regrowth structure and method Sep 11, 2019 Issued
Array ( [id] => 16316055 [patent_doc_number] => 20200294793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => SUBSTRATE TREATMENT APPARATUS AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/567269 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3629 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567269 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567269
Substrate treatment apparatus and manufacturing method of semiconductor device Sep 10, 2019 Issued
Array ( [id] => 15687945 [patent_doc_number] => 20200098636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => ELEMENT CHIP MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 16/567047 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8911 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567047 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567047
Element chip manufacturing method Sep 10, 2019 Issued
Array ( [id] => 15625297 [patent_doc_number] => 20200083053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => MULTILAYER GRAPHENE USING CHEMICAL VAPOR DEPOSITION AND METHOD OF MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 16/567262 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567262 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567262
Multilayer graphene using chemical vapor deposition and method of manufacturing same Sep 10, 2019 Issued
Array ( [id] => 15840593 [patent_doc_number] => 20200135579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 16/567053 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567053 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567053
Semiconductor device and method Sep 10, 2019 Issued
Array ( [id] => 17145299 [patent_doc_number] => 20210313312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => Transient Voltage Suppression Device And Manufacturing Method Therefor [patent_app_type] => utility [patent_app_number] => 17/265541 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6243 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17265541 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/265541
Transient voltage suppression device and manufacturing method therefor Sep 3, 2019 Issued
Array ( [id] => 15590573 [patent_doc_number] => 20200071821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => SUBSTRATE PROCESSING APPARATUS, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/555755 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11756 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16555755 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/555755
Substrate processing apparatus, and method of manufacturing semiconductor device Aug 28, 2019 Issued
Array ( [id] => 15687803 [patent_doc_number] => 20200098565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/555960 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16555960 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/555960
Semiconductor device Aug 28, 2019 Issued
Array ( [id] => 15597551 [patent_doc_number] => 20200075310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => BONDED WAFER, A METHOD OF MANUFACTURING THE SAME, AND A METHOD OF FORMING THROUGH HOLE [patent_app_type] => utility [patent_app_number] => 16/556095 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9954 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556095 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556095
Bonded wafer, a method of manufacturing the same, and a method of forming through hole Aug 28, 2019 Issued
Array ( [id] => 16789164 [patent_doc_number] => 10991603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Apparatus and method for treating substrate [patent_app_type] => utility [patent_app_number] => 16/556025 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6673 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556025 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556025
Apparatus and method for treating substrate Aug 28, 2019 Issued
Array ( [id] => 16119683 [patent_doc_number] => 20200211864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 16/556014 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556014 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556014
Substrate processing apparatus and substrate processing method Aug 28, 2019 Issued
Array ( [id] => 17092894 [patent_doc_number] => 11121092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Marking pattern in forming staircase structure of three-dimensional memory device [patent_app_type] => utility [patent_app_number] => 16/543237 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 8131 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543237
Marking pattern in forming staircase structure of three-dimensional memory device Aug 15, 2019 Issued
Array ( [id] => 15218007 [patent_doc_number] => 20190371690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => INSULATED HEAT DISSIPATION SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/542466 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7679 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542466 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/542466
Insulated heat dissipation substrate Aug 15, 2019 Issued
Array ( [id] => 16545094 [patent_doc_number] => 20200411509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => COMPUTATION-IN-MEMORY IN THREE-DIMENSIONAL MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/542274 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542274 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/542274
Computation-in-memory in three-dimensional memory device Aug 14, 2019 Issued
Array ( [id] => 17002701 [patent_doc_number] => 11081524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Three-dimensional memory devices [patent_app_type] => utility [patent_app_number] => 16/542266 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 10416 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542266 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/542266
Three-dimensional memory devices Aug 14, 2019 Issued
Array ( [id] => 15375783 [patent_doc_number] => 10529619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Conformal low temperature hermetic dielectric diffusion barriers [patent_app_type] => utility [patent_app_number] => 16/538666 [patent_app_country] => US [patent_app_date] => 2019-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5515 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16538666 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/538666
Conformal low temperature hermetic dielectric diffusion barriers Aug 11, 2019 Issued
Array ( [id] => 16835239 [patent_doc_number] => 11011499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Stacked device, stacked structure, and method of manufacturing stacked device [patent_app_type] => utility [patent_app_number] => 16/534464 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 79 [patent_no_of_words] => 30606 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16534464 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/534464
Stacked device, stacked structure, and method of manufacturing stacked device Aug 6, 2019 Issued
Array ( [id] => 15184879 [patent_doc_number] => 20190363031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => MODULE COMPONENT [patent_app_type] => utility [patent_app_number] => 16/533824 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16533824 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/533824
MODULE COMPONENT Aug 6, 2019 Abandoned
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