Sheikh Maruf

Array ( [id] => 18789586 [patent_doc_number] => 20230378279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SYSTEM AND METHOD FOR TWO-DIMENSIONAL ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 18/140669 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18140669 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19531988 [patent_doc_number] => 20240355890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => CONDUCTIVE BRIDGE THROUGH DIELECTRIC WALL BETWEEN SOURCE OR DRAIN CONTACTS [patent_app_type] => utility [patent_app_number] => 18/136991 [patent_app_country] => US [patent_app_date] => 2023-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16222 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18136991 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19531890 [patent_doc_number] => 20240355792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => REVERSED OVERHANG MEMORY ON PACKAGE (MOP) ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 18/137360 [patent_app_country] => US [patent_app_date] => 2023-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18137360 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18586142 [patent_doc_number] => 20230268407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => SEMICONDUCTOR DEVICES HAVING GATE RESISTORS WITH LOW VARIATION IN RESISTANCE VALUES [patent_app_type] => utility [patent_app_number] => 18/136911 [patent_app_country] => US [patent_app_date] => 2023-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16009 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18136911 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19314401 [patent_doc_number] => 12040226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Conformal low temperature hermetic dielectric diffusion barriers [patent_app_type] => utility [patent_app_number] => 18/137334 [patent_app_country] => US [patent_app_date] => 2023-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5627 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18137334 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19515847 [patent_doc_number] => 20240347533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SELF-ALIGNED CONTACT WITH CT CUT AFTER RMG [patent_app_type] => utility [patent_app_number] => 18/300421 [patent_app_country] => US [patent_app_date] => 2023-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18300421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19515654 [patent_doc_number] => 20240347340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => EPITAXIAL STRUCTURE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/299610 [patent_app_country] => US [patent_app_date] => 2023-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18299610 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19515737 [patent_doc_number] => 20240347423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => METAL CONTACT CONNECTION THROUGH DIFFUSION BREAK AREA [patent_app_type] => utility [patent_app_number] => 18/298402 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7224 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20133999 [patent_doc_number] => 12376330 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Integrated assemblies and methods of forming integrated assemblies [patent_app_type] => utility [patent_app_number] => 18/117483 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 50 [patent_no_of_words] => 4125 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18117483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20159599 [patent_doc_number] => 12386221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Light-emitting device, display apparatus, and illumination apparatus [patent_app_type] => utility [patent_app_number] => 18/113664 [patent_app_country] => US [patent_app_date] => 2023-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 4403 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18113664 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20705655 [patent_doc_number] => 12628381 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-12 [patent_title] => Wakeup-free ferroelectric memory device [patent_app_type] => utility [patent_app_number] => 18/173241 [patent_app_country] => US [patent_app_date] => 2023-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 7350 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18173241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19392982 [patent_doc_number] => 20240282852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => SEMICONDUCTOR STRUCTURE WITH DEVICE INCLUDING AT LEAST ONE IN-WELL POROUS REGION [patent_app_type] => utility [patent_app_number] => 18/171765 [patent_app_country] => US [patent_app_date] => 2023-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8811 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171765 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18456157 [patent_doc_number] => 20230197439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => SEMICONDUCTOR ARRANGEMENT AND METHOD FOR MAKING [patent_app_type] => utility [patent_app_number] => 18/111792 [patent_app_country] => US [patent_app_date] => 2023-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18111792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20900413 [patent_doc_number] => 12707693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-11 [patent_title] => Semiconductor device and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 18/170156 [patent_app_country] => US [patent_app_date] => 2023-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18170156 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18600348 [patent_doc_number] => 20230275150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING FERROELECTRIC MATERIAL AND ELECTRONIC DEVICE INCLUDING THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/168699 [patent_app_country] => US [patent_app_date] => 2023-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8750 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19000954 [patent_doc_number] => 11917832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Ferroelectric tunnel junction devices with metal-FE interface layer and methods for forming the same [patent_app_type] => utility [patent_app_number] => 18/109161 [patent_app_country] => US [patent_app_date] => 2023-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 31 [patent_no_of_words] => 11597 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18109161 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18555494 [patent_doc_number] => 20230253511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND 3D NAND MEMORY [patent_app_type] => utility [patent_app_number] => 18/166100 [patent_app_country] => US [patent_app_date] => 2023-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18166100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18631928 [patent_doc_number] => 20230290833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR WAFER [patent_app_type] => utility [patent_app_number] => 18/163423 [patent_app_country] => US [patent_app_date] => 2023-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18163423 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20390743 [patent_doc_number] => 12490491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Integrated circuit devices including a back side power distribution network structure and methods of forming the same [patent_app_type] => utility [patent_app_number] => 18/160341 [patent_app_country] => US [patent_app_date] => 2023-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 1069 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18160341 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18682440 [patent_doc_number] => 20230320117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => LIGHT-EMITTING DEVICE INCLUDING QUANTUM DOTS AND ELECTRONIC APPARATUS INCLUDING THE LIGHT-EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 18/155965 [patent_app_country] => US [patent_app_date] => 2023-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155965 [rel_patent_id] =>[rel_patent_doc_number] =>)