Sheila B. Smith

Array ( [id] => 9723044 [patent_doc_number] => 20140258745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'POWER STATE CHANGE IN DISK DRIVE BASED ON DISK ACCESS HISTORY' [patent_app_type] => utility [patent_app_number] => 13/788502 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788502 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10183718 [patent_doc_number] => 09213397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'Changing power modes of a microcontroller system' [patent_app_type] => utility [patent_app_number] => 13/788366 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2195 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788366 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9723001 [patent_doc_number] => 20140258703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'ADAPTIVE DATA SYNCHRONIZATION' [patent_app_type] => utility [patent_app_number] => 13/788684 [patent_app_country] => US [patent_app_date] => 2013-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3847 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788684 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9723037 [patent_doc_number] => 20140258738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'EMPLOYING POWER OVER ETHERNET FOR AUXILIARY POWER IN COMPUTER SYSTEMS' [patent_app_type] => utility [patent_app_number] => 13/786611 [patent_app_country] => US [patent_app_date] => 2013-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8362 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13786611 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9213961 [patent_doc_number] => 20140013138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-09 [patent_title] => 'MEMORY CONTROL DEVICE, SEMICONDUCTOR DEVICE, AND SYSTEM BOARD' [patent_app_type] => utility [patent_app_number] => 13/786706 [patent_app_country] => US [patent_app_date] => 2013-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8697 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13786706 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11299400 [patent_doc_number] => 09507406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-29 [patent_title] => 'Configuring power domains of a microcontroller system' [patent_app_type] => utility [patent_app_number] => 13/786042 [patent_app_country] => US [patent_app_date] => 2013-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2321 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13786042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9548660 [patent_doc_number] => 20140173308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'CHIP LEVEL POWER REDUCTION USING ENCODED COMMUNICATIONS' [patent_app_type] => utility [patent_app_number] => 13/785423 [patent_app_country] => US [patent_app_date] => 2013-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9635 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13785423 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10183709 [patent_doc_number] => 09213388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'Delaying reset signals in a microcontroller system' [patent_app_type] => utility [patent_app_number] => 13/785999 [patent_app_country] => US [patent_app_date] => 2013-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2439 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13785999 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10501122 [patent_doc_number] => 09229521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Watchdog circuit, power IC and watchdog monitor system' [patent_app_type] => utility [patent_app_number] => 13/754982 [patent_app_country] => US [patent_app_date] => 2013-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11785 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13754982 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9637145 [patent_doc_number] => 20140215254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'POWER OVER ETHERNET MANAGEMENT ON A NETWORK SWITCH' [patent_app_type] => utility [patent_app_number] => 13/755084 [patent_app_country] => US [patent_app_date] => 2013-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4421 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13755084 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8952723 [patent_doc_number] => 20130198504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => 'METHODS OF CONFIGURING A BIOS IN A COMPUTER SYSTEM AND COMPUTER PROGRAM PRODUCTS' [patent_app_type] => utility [patent_app_number] => 13/753851 [patent_app_country] => US [patent_app_date] => 2013-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5333 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13753851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9637119 [patent_doc_number] => 20140215228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'POWER OVER ETHERNET POWER HARVESTER' [patent_app_type] => utility [patent_app_number] => 13/754191 [patent_app_country] => US [patent_app_date] => 2013-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4220 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13754191 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10536303 [patent_doc_number] => 09261931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Peripheral special function register with soft-reset disable' [patent_app_type] => utility [patent_app_number] => 13/753375 [patent_app_country] => US [patent_app_date] => 2013-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3406 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13753375 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10170739 [patent_doc_number] => 09201446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'Timebase peripheral' [patent_app_type] => utility [patent_app_number] => 13/753341 [patent_app_country] => US [patent_app_date] => 2013-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5494 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13753341 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8952764 [patent_doc_number] => 20130198546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => 'DATA PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND STORAGE MEDIUM' [patent_app_type] => utility [patent_app_number] => 13/753264 [patent_app_country] => US [patent_app_date] => 2013-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9851 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13753264 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9548672 [patent_doc_number] => 20140173320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'MAINTAINING SYNCHRONIZATION DURING VERTICAL BLANKING' [patent_app_type] => utility [patent_app_number] => 13/717978 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5139 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13717978 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8952721 [patent_doc_number] => 20130198502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => 'Method For Reducing Platform Boot Times By Providing Lazy Input/Output Abstractions' [patent_app_type] => utility [patent_app_number] => 13/718060 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13718060 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10123993 [patent_doc_number] => 09158350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Link clock change during veritcal blanking' [patent_app_type] => utility [patent_app_number] => 13/717941 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5125 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13717941 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9548650 [patent_doc_number] => 20140173298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'PERFORMANCE AWARE IDLE POWER MANAGEMENT' [patent_app_type] => utility [patent_app_number] => 13/717992 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3059 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13717992 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9451692 [patent_doc_number] => 20140122862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'CONFIGURATION FILE UPDATER' [patent_app_type] => utility [patent_app_number] => 13/717860 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5137 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13717860 [rel_patent_id] =>[rel_patent_doc_number] =>)