Search

Sheila V. Clark

Examiner (ID: 325, Phone: (571)272-1725 , Office: P/2896 )

Most Active Art Unit
2815
Art Unit(s)
2503, 2508, 2896, 2891, 2815, 2504, 2823, 2607
Total Applications
3274
Issued Applications
2860
Pending Applications
49
Abandoned Applications
366

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10973134 [patent_doc_number] => 20140376169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/278121 [patent_app_country] => US [patent_app_date] => 2014-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2536 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14278121 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/278121
Semiconductor memory device and method of manufacturing the same May 14, 2014 Issued
Array ( [id] => 12294057 [patent_doc_number] => 09935040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-03 [patent_title] => Semiconductor module [patent_app_type] => utility [patent_app_number] => 15/124809 [patent_app_country] => US [patent_app_date] => 2014-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4043 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15124809 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/124809
Semiconductor module May 8, 2014 Issued
Array ( [id] => 10929922 [patent_doc_number] => 20140332943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'BARREL-PLATING QUAD FLAT NO-LEAD (QFN) PACKAGING STRUCTURES AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/271411 [patent_app_country] => US [patent_app_date] => 2014-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 69 [patent_figures_cnt] => 69 [patent_no_of_words] => 17019 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14271411 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/271411
Barrel-plating quad flat no-lead (QFN) packaging structures and method for manufacturing the same May 5, 2014 Issued
Array ( [id] => 13229131 [patent_doc_number] => 10128348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Metal bump structure for use in driver IC and method for forming the same [patent_app_type] => utility [patent_app_number] => 14/269209 [patent_app_country] => US [patent_app_date] => 2014-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4513 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14269209 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/269209
Metal bump structure for use in driver IC and method for forming the same May 4, 2014 Issued
Array ( [id] => 9654240 [patent_doc_number] => 20140225245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-14 [patent_title] => 'POWER SEMICONDUCTOR MODULE AND POWER SEMICONDUCTOR MODULE ASSEMBLY WITH MULTIPLE POWER SEMICONDUCTOR MODULES' [patent_app_type] => utility [patent_app_number] => 14/257397 [patent_app_country] => US [patent_app_date] => 2014-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4912 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14257397 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/257397
Power semiconductor module and power semiconductor module assembly with multiple power semiconductor modules Apr 20, 2014 Issued
Array ( [id] => 9642625 [patent_doc_number] => 20140220736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'POWER MODULE PACKAGE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/244834 [patent_app_country] => US [patent_app_date] => 2014-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5566 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14244834 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/244834
POWER MODULE PACKAGE AND METHOD FOR FABRICATING THE SAME Apr 2, 2014 Abandoned
Array ( [id] => 10936687 [patent_doc_number] => 20140339708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'SEMICONDUCTOR PACKAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/243165 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8805 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243165 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243165
Semiconductor package device Apr 1, 2014 Issued
Array ( [id] => 10093130 [patent_doc_number] => 09129960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-08 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/220318 [patent_app_country] => US [patent_app_date] => 2014-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 8969 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14220318 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/220318
Semiconductor device and manufacturing method thereof Mar 19, 2014 Issued
Array ( [id] => 9882375 [patent_doc_number] => 08969139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Lead frame array package with flip chip die attach' [patent_app_type] => utility [patent_app_number] => 14/215680 [patent_app_country] => US [patent_app_date] => 2014-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4356 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14215680 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/215680
Lead frame array package with flip chip die attach Mar 16, 2014 Issued
Array ( [id] => 10377926 [patent_doc_number] => 20150262933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF' [patent_app_type] => utility [patent_app_number] => 14/208310 [patent_app_country] => US [patent_app_date] => 2014-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4425 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14208310 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/208310
Semiconductor arrangement and formation thereof Mar 12, 2014 Issued
Array ( [id] => 9589258 [patent_doc_number] => 08778798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-07-15 [patent_title] => 'Electronic device package and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 14/207247 [patent_app_country] => US [patent_app_date] => 2014-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3700 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14207247 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/207247
Electronic device package and fabrication method thereof Mar 11, 2014 Issued
Array ( [id] => 11847577 [patent_doc_number] => 09735134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => 'Packages with through-vias having tapered ends' [patent_app_type] => utility [patent_app_number] => 14/206248 [patent_app_country] => US [patent_app_date] => 2014-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 4686 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14206248 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/206248
Packages with through-vias having tapered ends Mar 11, 2014 Issued
Array ( [id] => 10178907 [patent_doc_number] => 09209120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Semiconductor package with lead mounted power bar' [patent_app_type] => utility [patent_app_number] => 14/205323 [patent_app_country] => US [patent_app_date] => 2014-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3619 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14205323 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/205323
Semiconductor package with lead mounted power bar Mar 10, 2014 Issued
Array ( [id] => 10125222 [patent_doc_number] => 09159588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Packaged leadless semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/204338 [patent_app_country] => US [patent_app_date] => 2014-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4903 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14204338 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/204338
Packaged leadless semiconductor device Mar 10, 2014 Issued
Array ( [id] => 11179652 [patent_doc_number] => 09411644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Method and system for work scheduling in a multi-chip system' [patent_app_type] => utility [patent_app_number] => 14/201541 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 21809 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14201541 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/201541
Method and system for work scheduling in a multi-chip system Mar 6, 2014 Issued
Array ( [id] => 11781848 [patent_doc_number] => 09391048 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-12 [patent_title] => 'Semiconductor package' [patent_app_type] => utility [patent_app_number] => 14/201756 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 11344 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14201756 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/201756
Semiconductor package Mar 6, 2014 Issued
Array ( [id] => 10352727 [patent_doc_number] => 20150237732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'LOW-PROFILE PACKAGE WITH PASSIVE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/200684 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4818 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14200684 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/200684
LOW-PROFILE PACKAGE WITH PASSIVE DEVICE Mar 6, 2014 Abandoned
Array ( [id] => 13228847 [patent_doc_number] => 10128205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Embedded die flip-chip package assembly [patent_app_type] => utility [patent_app_number] => 14/199545 [patent_app_country] => US [patent_app_date] => 2014-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5816 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14199545 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/199545
Embedded die flip-chip package assembly Mar 5, 2014 Issued
Array ( [id] => 10329140 [patent_doc_number] => 20150214145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'Interconnect Structure and Method of Fabricating Same' [patent_app_type] => utility [patent_app_number] => 14/198262 [patent_app_country] => US [patent_app_date] => 2014-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5756 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14198262 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/198262
Interconnect structure and method of fabricating same Mar 4, 2014 Issued
Array ( [id] => 10010421 [patent_doc_number] => 09053945 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/196983 [patent_app_country] => US [patent_app_date] => 2014-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 44 [patent_no_of_words] => 23979 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14196983 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/196983
Semiconductor device Mar 3, 2014 Issued
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