Search

Sheila V. Clark

Examiner (ID: 7169, Phone: (571)272-1725 , Office: P/2896 )

Most Active Art Unit
2815
Art Unit(s)
2607, 2896, 2891, 2504, 2503, 2508, 2815, 2823
Total Applications
3274
Issued Applications
2860
Pending Applications
49
Abandoned Applications
366

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9828155 [patent_doc_number] => 08937384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-20 [patent_title] => 'Thermal management of integrated circuits using phase change material and heat spreaders' [patent_app_type] => utility [patent_app_number] => 13/455536 [patent_app_country] => US [patent_app_date] => 2012-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 11610 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13455536 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/455536
Thermal management of integrated circuits using phase change material and heat spreaders Apr 24, 2012 Issued
Array ( [id] => 8603992 [patent_doc_number] => 20130009304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-10 [patent_title] => 'CHIP-STACKED SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/450975 [patent_app_country] => US [patent_app_date] => 2012-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7812 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13450975 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/450975
Chip-stacked semiconductor package Apr 18, 2012 Issued
Array ( [id] => 9245981 [patent_doc_number] => 08610265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Compliant core peripheral lead semiconductor test socket' [patent_app_type] => utility [patent_app_number] => 13/448865 [patent_app_country] => US [patent_app_date] => 2012-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7812 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13448865 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/448865
Compliant core peripheral lead semiconductor test socket Apr 16, 2012 Issued
Array ( [id] => 8960910 [patent_doc_number] => 20130200512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'PACKAGE WITH INTERPOSER FRAME AND METHOD OF MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/448796 [patent_app_country] => US [patent_app_date] => 2012-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4854 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13448796 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/448796
Package with interposer frame and method of making the same Apr 16, 2012 Issued
Array ( [id] => 9079168 [patent_doc_number] => 20130264698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'SEMICONDUCTOR DEVICE WITH HEAT DISSIPATION' [patent_app_type] => utility [patent_app_number] => 13/442015 [patent_app_country] => US [patent_app_date] => 2012-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4395 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13442015 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/442015
Semiconductor device with heat dissipation Apr 8, 2012 Issued
Array ( [id] => 8956496 [patent_doc_number] => 08502274 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-06 [patent_title] => 'Integrated circuit including power transistor cells and a connecting line' [patent_app_type] => utility [patent_app_number] => 13/441380 [patent_app_country] => US [patent_app_date] => 2012-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 5724 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13441380 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/441380
Integrated circuit including power transistor cells and a connecting line Apr 5, 2012 Issued
Array ( [id] => 9763057 [patent_doc_number] => 08847385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Chip arrangement, a method for forming a chip arrangement, a chip package, a method for forming a chip package' [patent_app_type] => utility [patent_app_number] => 13/430726 [patent_app_country] => US [patent_app_date] => 2012-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 9528 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13430726 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/430726
Chip arrangement, a method for forming a chip arrangement, a chip package, a method for forming a chip package Mar 26, 2012 Issued
Array ( [id] => 10893352 [patent_doc_number] => 08916968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-23 [patent_title] => 'Multichip power semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/431125 [patent_app_country] => US [patent_app_date] => 2012-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 7141 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13431125 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/431125
Multichip power semiconductor device Mar 26, 2012 Issued
Array ( [id] => 8634811 [patent_doc_number] => 20130026614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'STRUCTURE AND METHOD FOR BUMP TO LANDING TRACE RATIO' [patent_app_type] => utility [patent_app_number] => 13/426386 [patent_app_country] => US [patent_app_date] => 2012-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2355 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13426386 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/426386
Structure and method for bump to landing trace ratio Mar 20, 2012 Issued
Array ( [id] => 9996592 [patent_doc_number] => 09041194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Pressure unit' [patent_app_type] => utility [patent_app_number] => 14/004496 [patent_app_country] => US [patent_app_date] => 2012-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3779 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14004496 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/004496
Pressure unit Mar 14, 2012 Issued
Array ( [id] => 8277945 [patent_doc_number] => 20120171818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'HYBRID BONDING INTERFACE FOR 3-DIMENSIONAL CHIP INTEGRATION' [patent_app_type] => utility [patent_app_number] => 13/418716 [patent_app_country] => US [patent_app_date] => 2012-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6579 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13418716 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/418716
Hybrid bonding interface for 3-dimensional chip integration Mar 12, 2012 Issued
Array ( [id] => 9608780 [patent_doc_number] => 08785949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Light emitting apparatus and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/417362 [patent_app_country] => US [patent_app_date] => 2012-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 52 [patent_no_of_words] => 15143 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13417362 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/417362
Light emitting apparatus and method for manufacturing the same Mar 11, 2012 Issued
Array ( [id] => 8802853 [patent_doc_number] => 08441129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/412245 [patent_app_country] => US [patent_app_date] => 2012-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3874 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13412245 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/412245
Semiconductor device Mar 4, 2012 Issued
Array ( [id] => 10888672 [patent_doc_number] => 08912668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Electrical connections for chip scale packaging' [patent_app_type] => utility [patent_app_number] => 13/410195 [patent_app_country] => US [patent_app_date] => 2012-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6797 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13410195 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/410195
Electrical connections for chip scale packaging Feb 29, 2012 Issued
Array ( [id] => 10149820 [patent_doc_number] => 09182100 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-10 [patent_title] => 'Lighting device' [patent_app_type] => utility [patent_app_number] => 14/002760 [patent_app_country] => US [patent_app_date] => 2012-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 4394 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14002760 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/002760
Lighting device Feb 28, 2012 Issued
Array ( [id] => 8582974 [patent_doc_number] => 20130001795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'Wafer Level Package and a Method of Forming the Same' [patent_app_type] => utility [patent_app_number] => 13/407295 [patent_app_country] => US [patent_app_date] => 2012-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9685 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13407295 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/407295
Wafer Level Package and a Method of Forming the Same Feb 27, 2012 Abandoned
Array ( [id] => 8730193 [patent_doc_number] => 20130075762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'OPTICALLY TRANSMISSIVE METAL ELECTRODE, ELECTRONIC DEVICE, AND OPTICAL DEVICE' [patent_app_type] => utility [patent_app_number] => 13/405935 [patent_app_country] => US [patent_app_date] => 2012-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13045 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13405935 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/405935
Optically transmissive metal electrode, electronic device, and optical device Feb 26, 2012 Issued
Array ( [id] => 9239821 [patent_doc_number] => 08604616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Semiconductor chip including a chip via plug penetrating a substrate, a semiconductor stack, a semiconductor device package and an electronic apparatus including the semiconductor chip' [patent_app_type] => utility [patent_app_number] => 13/357743 [patent_app_country] => US [patent_app_date] => 2012-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 13065 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13357743 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/357743
Semiconductor chip including a chip via plug penetrating a substrate, a semiconductor stack, a semiconductor device package and an electronic apparatus including the semiconductor chip Jan 24, 2012 Issued
Array ( [id] => 8193020 [patent_doc_number] => 20120119363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'GRAIN REFINEMENT BY PRECIPITATE FORMATION IN Pb-FREE ALLOYS OF TIN' [patent_app_type] => utility [patent_app_number] => 13/357146 [patent_app_country] => US [patent_app_date] => 2012-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5561 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119363.pdf [firstpage_image] =>[orig_patent_app_number] => 13357146 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/357146
Grain refinement by precipitate formation in Pb-free alloys of tin Jan 23, 2012 Issued
Array ( [id] => 9504264 [patent_doc_number] => 08742583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Seal ring in an integrated circuit die' [patent_app_type] => utility [patent_app_number] => 13/351144 [patent_app_country] => US [patent_app_date] => 2012-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13351144 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/351144
Seal ring in an integrated circuit die Jan 15, 2012 Issued
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