
Sheila V. Clark
Examiner (ID: 7169, Phone: (571)272-1725 , Office: P/2896 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2607, 2896, 2891, 2504, 2503, 2508, 2815, 2823 |
| Total Applications | 3274 |
| Issued Applications | 2860 |
| Pending Applications | 49 |
| Abandoned Applications | 366 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5445901
[patent_doc_number] => 20090047127
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-19
[patent_title] => ' TURBOMACHINE DIFFUSER'
[patent_app_type] => utility
[patent_app_number] => 12/190105
[patent_app_country] => US
[patent_app_date] => 2008-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3090
[patent_no_of_claims] => 2
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0047/20090047127.pdf
[firstpage_image] =>[orig_patent_app_number] => 12190105
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/190105 | Turbomachine diffuser | Aug 11, 2008 | Issued |
| 12/187864 | INTERCONNECT STRUCTURE WITH METAL CAP SELF-ALIGNED TO A SURFACE OF AN EMBEDDED CONDUCTIVE MATERIAL | Aug 6, 2008 | Abandoned |
Array
(
[id] => 6600765
[patent_doc_number] => 20100032820
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-11
[patent_title] => 'Stacked Memory Module'
[patent_app_type] => utility
[patent_app_number] => 12/187183
[patent_app_country] => US
[patent_app_date] => 2008-08-06
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 12187183
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/187183 | Stacked Memory Module | Aug 5, 2008 | Abandoned |
Array
(
[id] => 233183
[patent_doc_number] => 07598611
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-06
[patent_title] => 'Semiconductor device with side terminals'
[patent_app_type] => utility
[patent_app_number] => 12/186573
[patent_app_country] => US
[patent_app_date] => 2008-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/07/598/07598611.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/186573 | Semiconductor device with side terminals | Aug 5, 2008 | Issued |
Array
(
[id] => 6247303
[patent_doc_number] => 20100025835
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-04
[patent_title] => 'INTEGRATED CIRCUIT PACKAGE STACKING SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 12/185063
[patent_app_country] => US
[patent_app_date] => 2008-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 5935
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[firstpage_image] =>[orig_patent_app_number] => 12185063
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/185063 | Integrated circuit package stacking system | Jul 31, 2008 | Issued |
Array
(
[id] => 6247346
[patent_doc_number] => 20100025864
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-04
[patent_title] => 'SHIELDED WIREBOND'
[patent_app_type] => utility
[patent_app_number] => 12/183483
[patent_app_country] => US
[patent_app_date] => 2008-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 2142
[patent_no_of_claims] => 18
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[pdf_file] => publications/A1/0025/20100025864.pdf
[firstpage_image] =>[orig_patent_app_number] => 12183483
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/183483 | SHIELDED WIREBOND | Jul 30, 2008 | Abandoned |
Array
(
[id] => 174230
[patent_doc_number] => 07659610
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-09
[patent_title] => 'Flash memory card'
[patent_app_type] => utility
[patent_app_number] => 12/181721
[patent_app_country] => US
[patent_app_date] => 2008-07-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/659/07659610.pdf
[firstpage_image] =>[orig_patent_app_number] => 12181721
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/181721 | Flash memory card | Jul 28, 2008 | Issued |
Array
(
[id] => 260411
[patent_doc_number] => 07573140
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-11
[patent_title] => 'Semiconductor device and method for manufacturing the same'
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[patent_app_number] => 12/180604
[patent_app_country] => US
[patent_app_date] => 2008-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3825
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[pdf_file] => patents/07/573/07573140.pdf
[firstpage_image] =>[orig_patent_app_number] => 12180604
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/180604 | Semiconductor device and method for manufacturing the same | Jul 27, 2008 | Issued |
Array
(
[id] => 4708228
[patent_doc_number] => 20080296754
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-04
[patent_title] => 'APPARATUS TO MINIMIZE THERMAL IMPEDANCE USING COPPER ON DIE BACKSIDE'
[patent_app_type] => utility
[patent_app_number] => 12/179225
[patent_app_country] => US
[patent_app_date] => 2008-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 4770
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0296/20080296754.pdf
[firstpage_image] =>[orig_patent_app_number] => 12179225
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/179225 | Apparatus to minimize thermal impedance using copper on die backside | Jul 23, 2008 | Issued |
Array
(
[id] => 6336737
[patent_doc_number] => 20100019362
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-01-28
[patent_title] => 'ISOLATED STACKED DIE SEMICONDUCTOR PACKAGES'
[patent_app_type] => utility
[patent_app_number] => 12/178023
[patent_app_country] => US
[patent_app_date] => 2008-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => publications/A1/0019/20100019362.pdf
[firstpage_image] =>[orig_patent_app_number] => 12178023
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/178023 | ISOLATED STACKED DIE SEMICONDUCTOR PACKAGES | Jul 22, 2008 | Abandoned |
Array
(
[id] => 4538267
[patent_doc_number] => 07888785
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[patent_kind] => B2
[patent_issue_date] => 2011-02-15
[patent_title] => 'Semiconductor package embedded in substrate, system including the same and associated methods'
[patent_app_type] => utility
[patent_app_number] => 12/219263
[patent_app_country] => US
[patent_app_date] => 2008-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/07/888/07888785.pdf
[firstpage_image] =>[orig_patent_app_number] => 12219263
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/219263 | Semiconductor package embedded in substrate, system including the same and associated methods | Jul 17, 2008 | Issued |
Array
(
[id] => 5288158
[patent_doc_number] => 20090020888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-22
[patent_title] => 'CIRCUIT MODULE AND ELECTRICAL COMPONENT'
[patent_app_type] => utility
[patent_app_number] => 12/175574
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[patent_app_date] => 2008-07-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/175574 | Circuit module and electrical component | Jul 17, 2008 | Issued |
Array
(
[id] => 5334583
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[patent_title] => 'Semiconductor apparatus and method of manufacturing the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/219053 | Semiconductor apparatus and method of manufacturing the same | Jul 14, 2008 | Issued |
Array
(
[id] => 5307613
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[patent_title] => 'STACKED SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE'
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Array
(
[id] => 5307614
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[patent_title] => 'Interposer chip, method of manufacturing the interposer chip, and multi-chip package having the interposer chip'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/169031 | Semiconductor chip, method of fabricating the same and stack package having the same | Jul 7, 2008 | Issued |
Array
(
[id] => 4472481
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[patent_title] => 'Semiconductor device having improved contact interface reliability and method therefor'
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[patent_app_number] => 12/169151
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/169151 | Semiconductor device having improved contact interface reliability and method therefor | Jul 7, 2008 | Issued |
Array
(
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Array
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Array
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