Search

Shelly A. Chase

Examiner (ID: 16641, Phone: (571)272-3816 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2784, 2786, 2133
Total Applications
2002
Issued Applications
1848
Pending Applications
97
Abandoned Applications
74

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14585489 [patent_doc_number] => 20190220353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => METHOD FOR ACCESSING FLASH MEMORY MODULE AND ASSOCIATED FLASH MEMORY CONTROLLER AND MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/361200 [patent_app_country] => US [patent_app_date] => 2019-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7565 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16361200 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/361200
Method for accessing flash memory module and associated flash memory controller and memory device Mar 20, 2019 Issued
Array ( [id] => 16171590 [patent_doc_number] => 10713160 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-14 [patent_title] => Data writing method, memory control circuit unit and memory storage device [patent_app_type] => utility [patent_app_number] => 16/358719 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 8765 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16358719 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/358719
Data writing method, memory control circuit unit and memory storage device Mar 19, 2019 Issued
Array ( [id] => 16324915 [patent_doc_number] => 10784896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-22 [patent_title] => High performance data redundancy and fault tolerance [patent_app_type] => utility [patent_app_number] => 16/355514 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6441 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16355514 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/355514
High performance data redundancy and fault tolerance Mar 14, 2019 Issued
Array ( [id] => 14589245 [patent_doc_number] => 20190222231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => APPARATUS FOR TIME INTERLEAVING AND METHOD USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/353423 [patent_app_country] => US [patent_app_date] => 2019-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16353423 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/353423
Apparatus for time interleaving and method using the same Mar 13, 2019 Issued
Array ( [id] => 14538823 [patent_doc_number] => 20190205033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => STORING DATA UTILIZING A MAXIMUM ACCESSIBILITY APPROACH IN A DISPERSED STORAGE NETWORK [patent_app_type] => utility [patent_app_number] => 16/298150 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7979 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16298150 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/298150
Storing data utilizing a maximum accessibility approach in a dispersed storage network Mar 10, 2019 Issued
Array ( [id] => 14786463 [patent_doc_number] => 20190268129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => WIRELESS DEVICE ARCHITECTURE TO SUPPORT VERY-HIGH-RELIABILITY (VHR) COMMUNICATION [patent_app_type] => utility [patent_app_number] => 16/298834 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8603 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16298834 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/298834
Wireless device architecture to support very-high-reliability (VHR) communication Mar 10, 2019 Issued
Array ( [id] => 14544163 [patent_doc_number] => 20190207703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => CODE BLOCK SEGMENTATION AND CONFIGURATION FOR CONCATENATED TURBO AND RS CODING [patent_app_type] => utility [patent_app_number] => 16/298560 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8886 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16298560 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/298560
Code block segmentation and configuration for concatenated turbo and RS coding Mar 10, 2019 Issued
Array ( [id] => 16632285 [patent_doc_number] => 20210050939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => RECONFIGURABLE ADAPTIVE FORWARD ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 16/976446 [patent_app_country] => US [patent_app_date] => 2019-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5249 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16976446 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/976446
Reconfigurable adaptive forward error correction Mar 1, 2019 Issued
Array ( [id] => 14724243 [patent_doc_number] => 20190253185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => Low-Delay Packet Erasure Coding [patent_app_type] => utility [patent_app_number] => 16/277255 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277255 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/277255
Low-delay packet erasure coding Feb 14, 2019 Issued
Array ( [id] => 16632211 [patent_doc_number] => 20210050865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => SELF-DECODABLE REDUNDANCY VERSIONS FOR POLAR CODES [patent_app_type] => utility [patent_app_number] => 16/968920 [patent_app_country] => US [patent_app_date] => 2019-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -34 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16968920 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/968920
Self-decodable redundancy versions for polar codes Feb 13, 2019 Issued
Array ( [id] => 16241357 [patent_doc_number] => 20200258591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => INFORMATION HANDLING SYSTEM AND METHOD TO DYNAMICALLY DETECT AND RECOVER FROM THERMALLY INDUCED MEMORY FAILURES [patent_app_type] => utility [patent_app_number] => 16/270974 [patent_app_country] => US [patent_app_date] => 2019-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7712 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16270974 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/270974
Information handling system and method to dynamically detect and recover from thermally induced memory failures Feb 7, 2019 Issued
Array ( [id] => 14813927 [patent_doc_number] => 20190273573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-05 [patent_title] => HIGH-RATE TRELLIS CODED MODULATIONS [patent_app_type] => utility [patent_app_number] => 16/271316 [patent_app_country] => US [patent_app_date] => 2019-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14986 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16271316 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/271316
HIGH-RATE TRELLIS CODED MODULATIONS Feb 7, 2019 Abandoned
Array ( [id] => 16567396 [patent_doc_number] => 10892777 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Fast error recovery with error correction code (ECC) syndrome weight assist [patent_app_type] => utility [patent_app_number] => 16/269051 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 7002 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16269051 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/269051
Fast error recovery with error correction code (ECC) syndrome weight assist Feb 5, 2019 Issued
Array ( [id] => 16418619 [patent_doc_number] => 10826529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Parallel LDPC decoder [patent_app_type] => utility [patent_app_number] => 16/264161 [patent_app_country] => US [patent_app_date] => 2019-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 8617 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16264161 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/264161
Parallel LDPC decoder Jan 30, 2019 Issued
Array ( [id] => 16537318 [patent_doc_number] => 10879939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Decoding method and device, and decoder [patent_app_type] => utility [patent_app_number] => 16/264014 [patent_app_country] => US [patent_app_date] => 2019-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 13133 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 411 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16264014 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/264014
Decoding method and device, and decoder Jan 30, 2019 Issued
Array ( [id] => 16208080 [patent_doc_number] => 20200241070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => IN-SYSTEM STRUCTURAL TESTING OF A SYSTEM-ON-CHIP (SOC) USING A PERIPHERAL INTERFACE PORT [patent_app_type] => utility [patent_app_number] => 16/262550 [patent_app_country] => US [patent_app_date] => 2019-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6353 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16262550 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/262550
In-system structural testing of a system-on-chip (SoC) using a peripheral interface port Jan 29, 2019 Issued
Array ( [id] => 16173593 [patent_doc_number] => 10715179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Low density parity check code for terrestrial cloud broadcast [patent_app_type] => utility [patent_app_number] => 16/256828 [patent_app_country] => US [patent_app_date] => 2019-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5097 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16256828 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/256828
Low density parity check code for terrestrial cloud broadcast Jan 23, 2019 Issued
Array ( [id] => 14318941 [patent_doc_number] => 20190149174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => APPARATUS [patent_app_type] => utility [patent_app_number] => 16/250097 [patent_app_country] => US [patent_app_date] => 2019-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16250097 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/250097
Apparatus to improve flexibility of data transmission Jan 16, 2019 Issued
Array ( [id] => 16403145 [patent_doc_number] => 20200344003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => TRANSMISSION METHOD AND RECEIVING DEVICE [patent_app_type] => utility [patent_app_number] => 16/960683 [patent_app_country] => US [patent_app_date] => 2019-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 48581 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 417 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16960683 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/960683
Transmission method and receiving device Jan 7, 2019 Issued
Array ( [id] => 16441130 [patent_doc_number] => 20200358457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => TRANSMISSION METHOD AND RECEPTION DEVICE [patent_app_type] => utility [patent_app_number] => 16/961061 [patent_app_country] => US [patent_app_date] => 2019-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 50273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 423 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16961061 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/961061
Transmission method and reception device Jan 7, 2019 Issued
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