Search

Shelly A. Chase

Examiner (ID: 534, Phone: (571)272-3816 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2786, 2784, 2112, 2133
Total Applications
2003
Issued Applications
1848
Pending Applications
98
Abandoned Applications
74

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13556485 [patent_doc_number] => 20180329790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => RUNTIME MECHANISM TO CORRECT INCOMPLETE NAMESPACE IN PERSISTENT MEMORY [patent_app_type] => utility [patent_app_number] => 15/594774 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594774 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594774
Runtime mechanism to correct incomplete namespace in persistent memory May 14, 2017 Issued
Array ( [id] => 14201497 [patent_doc_number] => 10267857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Method and system for functional safety verification [patent_app_type] => utility [patent_app_number] => 15/592602 [patent_app_country] => US [patent_app_date] => 2017-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11753 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15592602 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/592602
Method and system for functional safety verification May 10, 2017 Issued
Array ( [id] => 12571182 [patent_doc_number] => 10019312 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-10 [patent_title] => Error monitoring of a memory device containing embedded error correction [patent_app_type] => utility [patent_app_number] => 15/583019 [patent_app_country] => US [patent_app_date] => 2017-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8101 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15583019 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/583019
Error monitoring of a memory device containing embedded error correction Apr 30, 2017 Issued
Array ( [id] => 13526365 [patent_doc_number] => 20180314725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => OBJECT FORMAT RESILIENT TO REMOTE OBJECT STORE ERRORS [patent_app_type] => utility [patent_app_number] => 15/581531 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15581531 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/581531
Object format resilient to remote object store errors Apr 27, 2017 Issued
Array ( [id] => 11855571 [patent_doc_number] => 20170230063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'INTERLEAVING AND PUNCTURING APPARATUS AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/581377 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5031 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15581377 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/581377
Interleaving and puncturing apparatus and method thereof Apr 27, 2017 Issued
Array ( [id] => 12189399 [patent_doc_number] => 20180048335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'METHODS AND APPARATUS FOR DECODER PROCESSING FOR JOINT MULTI-USER DETECTION' [patent_app_type] => utility [patent_app_number] => 15/499514 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11119 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15499514 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/499514
METHODS AND APPARATUS FOR DECODER PROCESSING FOR JOINT MULTI-USER DETECTION Apr 26, 2017 Abandoned
Array ( [id] => 12852142 [patent_doc_number] => 20180175887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => HIGH PERFORMANCE DATA REDUNDANCY AND FAULT TOLERANCE [patent_app_type] => utility [patent_app_number] => 15/499664 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6405 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15499664 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/499664
High performance data redundancy and fault tolerance Apr 26, 2017 Issued
Array ( [id] => 13526103 [patent_doc_number] => 20180314594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => Multi-Layer Integrated Zone Partition System Error Correction [patent_app_type] => utility [patent_app_number] => 15/497879 [patent_app_country] => US [patent_app_date] => 2017-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7563 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15497879 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/497879
Multi-layer integrated zone partition system error correction Apr 25, 2017 Issued
Array ( [id] => 14298721 [patent_doc_number] => 10289487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Method for accessing flash memory module and associated flash memory controller and memory device [patent_app_type] => utility [patent_app_number] => 15/495993 [patent_app_country] => US [patent_app_date] => 2017-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7539 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15495993 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/495993
Method for accessing flash memory module and associated flash memory controller and memory device Apr 24, 2017 Issued
Array ( [id] => 12006268 [patent_doc_number] => 20170310423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'APPARATUS FOR TIME INTERLEAVING AND METHOD USING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/495860 [patent_app_country] => US [patent_app_date] => 2017-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 38230 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15495860 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/495860
Apparatus for time interleaving and method using the same Apr 23, 2017 Issued
Array ( [id] => 14298411 [patent_doc_number] => 10289332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Apparatus and method for increasing resilience to faults [patent_app_type] => utility [patent_app_number] => 15/493609 [patent_app_country] => US [patent_app_date] => 2017-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 10581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15493609 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/493609
Apparatus and method for increasing resilience to faults Apr 20, 2017 Issued
Array ( [id] => 13294615 [patent_doc_number] => 10158515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Apparatus and method for sending and receiving broadcast signals [patent_app_type] => utility [patent_app_number] => 15/477371 [patent_app_country] => US [patent_app_date] => 2017-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 70 [patent_no_of_words] => 26939 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15477371 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/477371
Apparatus and method for sending and receiving broadcast signals Apr 2, 2017 Issued
Array ( [id] => 14037455 [patent_doc_number] => 10230493 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Code block segmentation and configuration for concatenated turbo and RS coding [patent_app_type] => utility [patent_app_number] => 15/462719 [patent_app_country] => US [patent_app_date] => 2017-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8826 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15462719 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/462719
Code block segmentation and configuration for concatenated turbo and RS coding Mar 16, 2017 Issued
Array ( [id] => 12262346 [patent_doc_number] => 20180081542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/455419 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 14304 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455419 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455419
Memory system Mar 9, 2017 Issued
Array ( [id] => 13157801 [patent_doc_number] => 10095626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-09 [patent_title] => Multibit NAND media using pseudo-SLC caching technique [patent_app_type] => utility [patent_app_number] => 15/456346 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10855 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456346 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/456346
Multibit NAND media using pseudo-SLC caching technique Mar 9, 2017 Issued
Array ( [id] => 12061644 [patent_doc_number] => 20170337988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'Test Apparatus Based on Binary Vector' [patent_app_type] => utility [patent_app_number] => 15/456195 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5850 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456195 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/456195
Test apparatus based on binary vector Mar 9, 2017 Issued
Array ( [id] => 13113057 [patent_doc_number] => 10075197 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-09-11 [patent_title] => Method and apparatus for transmitting hamming weight and codeword [patent_app_type] => utility [patent_app_number] => 15/452687 [patent_app_country] => US [patent_app_date] => 2017-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 9801 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15452687 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/452687
Method and apparatus for transmitting hamming weight and codeword Mar 6, 2017 Issued
Array ( [id] => 11708731 [patent_doc_number] => 20170177229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'STORAGE OF DATA WITH VERIFICATION IN A DISPERSED STORAGE NETWORK' [patent_app_type] => utility [patent_app_number] => 15/450470 [patent_app_country] => US [patent_app_date] => 2017-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 56 [patent_no_of_words] => 43990 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15450470 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/450470
Storage of data with verification in a dispersed storage network Mar 5, 2017 Issued
Array ( [id] => 14175683 [patent_doc_number] => 10261857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => Memory system and method for controlling code rate for data to be stored [patent_app_type] => utility [patent_app_number] => 15/449383 [patent_app_country] => US [patent_app_date] => 2017-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 14584 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15449383 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/449383
Memory system and method for controlling code rate for data to be stored Mar 2, 2017 Issued
Array ( [id] => 11711584 [patent_doc_number] => 20170180083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'TRANSMISSION METHOD USING PARITY PACKETS, TRANSMITTER AND REPEATER' [patent_app_type] => utility [patent_app_number] => 15/447296 [patent_app_country] => US [patent_app_date] => 2017-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 60 [patent_no_of_words] => 34637 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15447296 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/447296
Transmission method using parity packets, transmitter and repeater Mar 1, 2017 Issued
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