Search

Shelly A. Chase

Examiner (ID: 534, Phone: (571)272-3816 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2786, 2784, 2112, 2133
Total Applications
2003
Issued Applications
1848
Pending Applications
98
Abandoned Applications
74

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11287437 [patent_doc_number] => 09503303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Symbol mapping for binary coding' [patent_app_type] => utility [patent_app_number] => 14/950866 [patent_app_country] => US [patent_app_date] => 2015-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5167 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14950866 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/950866
Symbol mapping for binary coding Nov 23, 2015 Issued
Array ( [id] => 11552323 [patent_doc_number] => 09621190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-11 [patent_title] => 'Low density parity check code for terrestrial cloud broadcast' [patent_app_type] => utility [patent_app_number] => 14/942392 [patent_app_country] => US [patent_app_date] => 2015-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4878 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14942392 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/942392
Low density parity check code for terrestrial cloud broadcast Nov 15, 2015 Issued
Array ( [id] => 11240523 [patent_doc_number] => 09467176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-11 [patent_title] => 'Computationally efficient convolutional coding with rate-matching' [patent_app_type] => utility [patent_app_number] => 14/940842 [patent_app_country] => US [patent_app_date] => 2015-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3649 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14940842 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/940842
Computationally efficient convolutional coding with rate-matching Nov 12, 2015 Issued
Array ( [id] => 14771065 [patent_doc_number] => 10396945 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Packet number representation for multicast channel block error rate reporting [patent_app_type] => utility [patent_app_number] => 15/524721 [patent_app_country] => US [patent_app_date] => 2015-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2963 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15524721 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/524721
Packet number representation for multicast channel block error rate reporting Oct 21, 2015 Issued
Array ( [id] => 13432615 [patent_doc_number] => 20180267850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => IN-BAND MARGIN PROBING ON AN OPERATIONAL INTERCONNECT [patent_app_type] => utility [patent_app_number] => 15/761405 [patent_app_country] => US [patent_app_date] => 2015-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15761405 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/761405
In-band margin probing on an operational interconnect Sep 25, 2015 Issued
Array ( [id] => 12215533 [patent_doc_number] => 09912355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Distributed concatenated error correction' [patent_app_type] => utility [patent_app_number] => 14/866506 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8675 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14866506 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/866506
Distributed concatenated error correction Sep 24, 2015 Issued
Array ( [id] => 11532402 [patent_doc_number] => 20170092380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'FULL ADDRESS COVERAGE DURING MEMORY ARRAY BUILT-IN SELF TEST WITH MINIMUM TRANSITIONS' [patent_app_type] => utility [patent_app_number] => 14/866094 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5895 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14866094 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/866094
Full address coverage during memory array built-in self test with minimum transitions Sep 24, 2015 Issued
Array ( [id] => 11926327 [patent_doc_number] => 09793922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Repair-optimal parity code' [patent_app_type] => utility [patent_app_number] => 14/865388 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9236 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14865388 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/865388
Repair-optimal parity code Sep 24, 2015 Issued
Array ( [id] => 11080132 [patent_doc_number] => 20160277096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'METHOD AND APPARATUS FOR SPECTRAL EFFICIENT DATA TRANSMISSION IN SATELLITE SYSTEMS' [patent_app_type] => utility [patent_app_number] => 14/865590 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 15944 [patent_no_of_claims] => 82 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14865590 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/865590
Method and apparatus for spectral efficient data transmission in satellite systems Sep 24, 2015 Issued
Array ( [id] => 11832422 [patent_doc_number] => 09729171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Techniques for soft decision decoding of encoded data' [patent_app_type] => utility [patent_app_number] => 14/864587 [patent_app_country] => US [patent_app_date] => 2015-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11295 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14864587 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/864587
Techniques for soft decision decoding of encoded data Sep 23, 2015 Issued
Array ( [id] => 11659108 [patent_doc_number] => 09672110 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-06 [patent_title] => 'Transmission time refinement in a storage system' [patent_app_type] => utility [patent_app_number] => 14/862003 [patent_app_country] => US [patent_app_date] => 2015-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 15082 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14862003 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/862003
Transmission time refinement in a storage system Sep 21, 2015 Issued
Array ( [id] => 10739316 [patent_doc_number] => 20160085467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'INTELLIGENT DATA PLACEMENT' [patent_app_type] => utility [patent_app_number] => 14/858842 [patent_app_country] => US [patent_app_date] => 2015-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6288 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14858842 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/858842
Intelligent data placement Sep 17, 2015 Issued
Array ( [id] => 11539302 [patent_doc_number] => 09613717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-04 [patent_title] => 'Error correction circuit and semiconductor memory device including the same' [patent_app_type] => utility [patent_app_number] => 14/855092 [patent_app_country] => US [patent_app_date] => 2015-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3036 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14855092 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/855092
Error correction circuit and semiconductor memory device including the same Sep 14, 2015 Issued
Array ( [id] => 10536632 [patent_doc_number] => 09262262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Memory device with retransmission upon error' [patent_app_type] => utility [patent_app_number] => 14/853869 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11957 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14853869 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/853869
Memory device with retransmission upon error Sep 13, 2015 Issued
Array ( [id] => 11563657 [patent_doc_number] => 09626246 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-18 [patent_title] => 'System and method for I/O optimized data migration between high performance computing entities and a data storage supported by a de-clustered raid (DCR)architecture with vertical execution of I/O commands' [patent_app_type] => utility [patent_app_number] => 14/849975 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10922 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 424 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14849975 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/849975
System and method for I/O optimized data migration between high performance computing entities and a data storage supported by a de-clustered raid (DCR)architecture with vertical execution of I/O commands Sep 9, 2015 Issued
Array ( [id] => 10536639 [patent_doc_number] => 09262269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'System and module comprising an electrically erasable programmable memory chip' [patent_app_type] => utility [patent_app_number] => 14/836467 [patent_app_country] => US [patent_app_date] => 2015-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11957 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14836467 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/836467
System and module comprising an electrically erasable programmable memory chip Aug 25, 2015 Issued
Array ( [id] => 13392313 [patent_doc_number] => 20180247699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => POST PACKAGE REPAIR FOR MAPPING TO A MEMORY FAILURE PATTERN [patent_app_type] => utility [patent_app_number] => 15/753315 [patent_app_country] => US [patent_app_date] => 2015-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15753315 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/753315
Post package repair for mapping to a memory failure pattern Aug 17, 2015 Issued
Array ( [id] => 10462208 [patent_doc_number] => 20150347223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'ELECTRICALLY ERASABLE PROGRAMMABLE MEMORY DEVICE THAT GENERATES A CYCLIC REDUNDANCY CHECK (CRC) CODE' [patent_app_type] => utility [patent_app_number] => 14/823804 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11957 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14823804 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/823804
Electrically erasable programmable memory device that generates a cyclic redundancy check (CRC) code Aug 10, 2015 Issued
Array ( [id] => 10448877 [patent_doc_number] => 20150333892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'METHOD FOR EFFECTIVELY TRANSMITTING CONTROL SIGNAL IN WIRELESS COMMUNICATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/810505 [patent_app_country] => US [patent_app_date] => 2015-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9721 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14810505 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/810505
Method for effectively transmitting control signal in wireless communication system Jul 27, 2015 Issued
Array ( [id] => 11884477 [patent_doc_number] => 09755666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-05 [patent_title] => 'Adaptive desaturation in min-sum decoding of LDPC codes' [patent_app_type] => utility [patent_app_number] => 14/808793 [patent_app_country] => US [patent_app_date] => 2015-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5299 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14808793 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/808793
Adaptive desaturation in min-sum decoding of LDPC codes Jul 23, 2015 Issued
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