Search

Shelly A. Chase

Examiner (ID: 534, Phone: (571)272-3816 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2786, 2784, 2112, 2133
Total Applications
2003
Issued Applications
1848
Pending Applications
98
Abandoned Applications
74

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10741502 [patent_doc_number] => 20160087653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'Decoder With Targeted Symbol Flipping Recovery Of Miscorrected Codewords' [patent_app_type] => utility [patent_app_number] => 14/444916 [patent_app_country] => US [patent_app_date] => 2014-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6323 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14444916 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/444916
Decoder With Targeted Symbol Flipping Recovery Of Miscorrected Codewords Jul 27, 2014 Abandoned
Array ( [id] => 9926380 [patent_doc_number] => 08984366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'CRC counter normalization' [patent_app_type] => utility [patent_app_number] => 14/338503 [patent_app_country] => US [patent_app_date] => 2014-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14338503 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/338503
CRC counter normalization Jul 22, 2014 Issued
Array ( [id] => 10551971 [patent_doc_number] => 09276612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Reed-Solomon erasure decoding with error detection for retransmission' [patent_app_type] => utility [patent_app_number] => 14/328237 [patent_app_country] => US [patent_app_date] => 2014-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8048 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14328237 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/328237
Reed-Solomon erasure decoding with error detection for retransmission Jul 9, 2014 Issued
Array ( [id] => 10907565 [patent_doc_number] => 20140310579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-16 [patent_title] => 'METHOD FOR GENERATING FORWARD ERROR CORRECTION PACKET IN MULTIMEDIA SYSTEM AND METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING FORWARD ERROR CORRECTION PACKET' [patent_app_type] => utility [patent_app_number] => 14/313353 [patent_app_country] => US [patent_app_date] => 2014-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9021 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14313353 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/313353
Method for generating forward error correction packet in multimedia system and method and apparatus for transmitting and receiving forward error correction packet Jun 23, 2014 Issued
Array ( [id] => 9967926 [patent_doc_number] => 09015561 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-04-21 [patent_title] => 'Adaptive redundancy in three dimensional memory' [patent_app_type] => utility [patent_app_number] => 14/301497 [patent_app_country] => US [patent_app_date] => 2014-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 10248 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14301497 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/301497
Adaptive redundancy in three dimensional memory Jun 10, 2014 Issued
Array ( [id] => 9746053 [patent_doc_number] => 20140281772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'DETECTING EFFECT OF CORRUPTING EVENT ON PRELOADED DATA IN NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/286571 [patent_app_country] => US [patent_app_date] => 2014-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6377 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14286571 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/286571
Detecting effect of corrupting event on preloaded data in non-volatile memory May 22, 2014 Issued
Array ( [id] => 10517716 [patent_doc_number] => 09244764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-26 [patent_title] => 'Error correcting code techniques for a memory having a three-dimensional memory configuration' [patent_app_type] => utility [patent_app_number] => 14/273005 [patent_app_country] => US [patent_app_date] => 2014-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 22580 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14273005 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/273005
Error correcting code techniques for a memory having a three-dimensional memory configuration May 7, 2014 Issued
Array ( [id] => 9886030 [patent_doc_number] => 08972814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Message rearrangement for improved wireless code performance' [patent_app_type] => utility [patent_app_number] => 14/266344 [patent_app_country] => US [patent_app_date] => 2014-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 9584 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14266344 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/266344
Message rearrangement for improved wireless code performance Apr 29, 2014 Issued
Array ( [id] => 12352245 [patent_doc_number] => 09952924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-24 [patent_title] => Memory device, server device, and memory control method [patent_app_type] => utility [patent_app_number] => 14/916767 [patent_app_country] => US [patent_app_date] => 2014-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11520 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14916767 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/916767
Memory device, server device, and memory control method Apr 17, 2014 Issued
Array ( [id] => 9645149 [patent_doc_number] => 20140223262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'System and Method of Interfacing Co-Processors and Input/Output Devices via a Main Memory System' [patent_app_type] => utility [patent_app_number] => 14/247162 [patent_app_country] => US [patent_app_date] => 2014-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12771 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14247162 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/247162
System and method of interfacing co-processors and input/output devices via a main memory system Apr 6, 2014 Issued
Array ( [id] => 9847749 [patent_doc_number] => 08949683 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-03 [patent_title] => 'Adaptive successive interference cancellation receivers' [patent_app_type] => utility [patent_app_number] => 14/242091 [patent_app_country] => US [patent_app_date] => 2014-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 12473 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14242091 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/242091
Adaptive successive interference cancellation receivers Mar 31, 2014 Issued
Array ( [id] => 11910176 [patent_doc_number] => 09778986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Storage system' [patent_app_type] => utility [patent_app_number] => 14/426716 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 20102 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14426716 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/426716
Storage system Mar 27, 2014 Issued
Array ( [id] => 10011204 [patent_doc_number] => 09054740 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-06-09 [patent_title] => 'Low density parity check decoding with early termination based on nonzero-circulant flags' [patent_app_type] => utility [patent_app_number] => 14/188068 [patent_app_country] => US [patent_app_date] => 2014-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 10342 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14188068 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/188068
Low density parity check decoding with early termination based on nonzero-circulant flags Feb 23, 2014 Issued
Array ( [id] => 9947644 [patent_doc_number] => 08996972 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-31 [patent_title] => 'Low-density parity-check decoder' [patent_app_type] => utility [patent_app_number] => 14/179179 [patent_app_country] => US [patent_app_date] => 2014-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4345 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14179179 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/179179
Low-density parity-check decoder Feb 11, 2014 Issued
Array ( [id] => 10052473 [patent_doc_number] => 09092352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Memory controller with write data error detection and remediation' [patent_app_type] => utility [patent_app_number] => 14/175955 [patent_app_country] => US [patent_app_date] => 2014-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11907 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14175955 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/175955
Memory controller with write data error detection and remediation Feb 6, 2014 Issued
Array ( [id] => 9853069 [patent_doc_number] => 08954818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Error detection and correction scheme for a memory device' [patent_app_type] => utility [patent_app_number] => 14/173256 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2691 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173256 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173256
Error detection and correction scheme for a memory device Feb 4, 2014 Issued
Array ( [id] => 10335388 [patent_doc_number] => 20150220393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'METHOD AND APPARATUS FOR STORING TRACE DATA' [patent_app_type] => utility [patent_app_number] => 14/172684 [patent_app_country] => US [patent_app_date] => 2014-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6336 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14172684 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/172684
Method and apparatus for storing trace data Feb 3, 2014 Issued
Array ( [id] => 11792070 [patent_doc_number] => 09401729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-26 [patent_title] => 'Maintaining running disparity while utilizing different line-codes' [patent_app_type] => utility [patent_app_number] => 14/170826 [patent_app_country] => US [patent_app_date] => 2014-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 13560 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14170826 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/170826
Maintaining running disparity while utilizing different line-codes Feb 2, 2014 Issued
Array ( [id] => 10327880 [patent_doc_number] => 20150212885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'ERROR FEEDBACK AND LOGGING WITH MEMORY ON-CHIP ERROR CHECKING AND CORRECTING (ECC)' [patent_app_type] => utility [patent_app_number] => 14/168460 [patent_app_country] => US [patent_app_date] => 2014-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3902 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14168460 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/168460
Error feedback and logging with memory on-chip error checking and correcting (ECC) Jan 29, 2014 Issued
Array ( [id] => 9637183 [patent_doc_number] => 20140215292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'LT STAIRCASE FEC CODE' [patent_app_type] => utility [patent_app_number] => 14/166347 [patent_app_country] => US [patent_app_date] => 2014-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11987 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14166347 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/166347
LT staircase FEC code Jan 27, 2014 Issued
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