Search

Shelly A. Chase

Examiner (ID: 3566, Phone: (571)272-3816 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2784, 2786, 2133, 2112
Total Applications
2020
Issued Applications
1860
Pending Applications
102
Abandoned Applications
74

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4582140 [patent_doc_number] => 07840876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Power savings for memory with error correction mode' [patent_app_type] => utility [patent_app_number] => 11/676774 [patent_app_country] => US [patent_app_date] => 2007-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5493 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/840/07840876.pdf [firstpage_image] =>[orig_patent_app_number] => 11676774 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/676774
Power savings for memory with error correction mode Feb 19, 2007 Issued
Array ( [id] => 4586132 [patent_doc_number] => 07856592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-21 [patent_title] => 'Apparatus and method for transmitting/receiving signal in a communication system' [patent_app_type] => utility [patent_app_number] => 11/708701 [patent_app_country] => US [patent_app_date] => 2007-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3890 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/856/07856592.pdf [firstpage_image] =>[orig_patent_app_number] => 11708701 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/708701
Apparatus and method for transmitting/receiving signal in a communication system Feb 18, 2007 Issued
Array ( [id] => 4557822 [patent_doc_number] => 07890843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-15 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/674342 [patent_app_country] => US [patent_app_date] => 2007-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 62 [patent_no_of_words] => 15169 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/890/07890843.pdf [firstpage_image] =>[orig_patent_app_number] => 11674342 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/674342
Semiconductor memory device Feb 12, 2007 Issued
Array ( [id] => 4487226 [patent_doc_number] => 07870469 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-01-11 [patent_title] => 'Parallel inversionless error and erasure processing' [patent_app_type] => utility [patent_app_number] => 11/706068 [patent_app_country] => US [patent_app_date] => 2007-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3970 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/870/07870469.pdf [firstpage_image] =>[orig_patent_app_number] => 11706068 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/706068
Parallel inversionless error and erasure processing Feb 11, 2007 Issued
Array ( [id] => 4815269 [patent_doc_number] => 20080195900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'Flash memory system and method for controlling the same' [patent_app_type] => utility [patent_app_number] => 11/704986 [patent_app_country] => US [patent_app_date] => 2007-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3084 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20080195900.pdf [firstpage_image] =>[orig_patent_app_number] => 11704986 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/704986
Flash memory system and method for controlling the same Feb 11, 2007 Issued
Array ( [id] => 4499321 [patent_doc_number] => 07886210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-08 [patent_title] => 'Apparatus for pipelined cyclic redundancy check circuit with multiple intermediate outputs' [patent_app_type] => utility [patent_app_number] => 11/673086 [patent_app_country] => US [patent_app_date] => 2007-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 4050 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/886/07886210.pdf [firstpage_image] =>[orig_patent_app_number] => 11673086 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/673086
Apparatus for pipelined cyclic redundancy check circuit with multiple intermediate outputs Feb 8, 2007 Issued
Array ( [id] => 5017619 [patent_doc_number] => 20070260828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'Method and Apparatus for Scrubbing Memory' [patent_app_type] => utility [patent_app_number] => 11/673432 [patent_app_country] => US [patent_app_date] => 2007-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4188 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0260/20070260828.pdf [firstpage_image] =>[orig_patent_app_number] => 11673432 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/673432
Method and apparatus for scrubbing memory Feb 8, 2007 Issued
Array ( [id] => 4487249 [patent_doc_number] => 07870473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Error detection device for an address decoder, and device for error detection for an address decoder' [patent_app_type] => utility [patent_app_number] => 11/672638 [patent_app_country] => US [patent_app_date] => 2007-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 10016 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/870/07870473.pdf [firstpage_image] =>[orig_patent_app_number] => 11672638 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/672638
Error detection device for an address decoder, and device for error detection for an address decoder Feb 7, 2007 Issued
Array ( [id] => 4550316 [patent_doc_number] => 07925965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Method for transmitting/receiving signals in a communications system and an apparatus therefor' [patent_app_type] => utility [patent_app_number] => 11/702005 [patent_app_country] => US [patent_app_date] => 2007-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4177 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/925/07925965.pdf [firstpage_image] =>[orig_patent_app_number] => 11702005 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/702005
Method for transmitting/receiving signals in a communications system and an apparatus therefor Feb 1, 2007 Issued
Array ( [id] => 4527980 [patent_doc_number] => 07934137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Message remapping and encoding' [patent_app_type] => utility [patent_app_number] => 11/670327 [patent_app_country] => US [patent_app_date] => 2007-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7509 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/934/07934137.pdf [firstpage_image] =>[orig_patent_app_number] => 11670327 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/670327
Message remapping and encoding Jan 31, 2007 Issued
Array ( [id] => 4934875 [patent_doc_number] => 20080005650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'LDPC (low density parity check) coded modulation hybrid decoding' [patent_app_type] => utility [patent_app_number] => 11/701156 [patent_app_country] => US [patent_app_date] => 2007-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 23595 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20080005650.pdf [firstpage_image] =>[orig_patent_app_number] => 11701156 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701156
LDPC (Low Density Parity Check) coded modulation hybrid decoding Jan 31, 2007 Issued
Array ( [id] => 27466 [patent_doc_number] => 07802167 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-09-21 [patent_title] => 'Apparatus and method for detecting extended error bursts' [patent_app_type] => utility [patent_app_number] => 11/669479 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8014 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/802/07802167.pdf [firstpage_image] =>[orig_patent_app_number] => 11669479 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/669479
Apparatus and method for detecting extended error bursts Jan 30, 2007 Issued
Array ( [id] => 5161711 [patent_doc_number] => 20070174755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Post viterbi error correction apparatus and related methods' [patent_app_type] => utility [patent_app_number] => 11/655969 [patent_app_country] => US [patent_app_date] => 2007-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4618 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20070174755.pdf [firstpage_image] =>[orig_patent_app_number] => 11655969 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/655969
Post viterbi error correction apparatus and related methods Jan 21, 2007 Issued
Array ( [id] => 4979171 [patent_doc_number] => 20070220406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'METHOD AND APPARATUS FOR MEMORY OPTIMIZATION IN MPE-FEC SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/623617 [patent_app_country] => US [patent_app_date] => 2007-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7205 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20070220406.pdf [firstpage_image] =>[orig_patent_app_number] => 11623617 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/623617
Method and apparatus for memory optimization in MPE-FEC system Jan 15, 2007 Issued
Array ( [id] => 5161713 [patent_doc_number] => 20070174757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'DECODER AND METHOD FOR DECODING A TAIL-BITING CONVOLUTIONAL ENCODED SIGNAL USING VITERBI DECODING SCHEME' [patent_app_type] => utility [patent_app_number] => 11/621958 [patent_app_country] => US [patent_app_date] => 2007-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20070174757.pdf [firstpage_image] =>[orig_patent_app_number] => 11621958 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/621958
Decoder and method for decoding a tail-biting convolutional encoded signal using Viterbi decoding scheme Jan 9, 2007 Issued
Array ( [id] => 4559808 [patent_doc_number] => 07877666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Tracking health of integrated circuit structures' [patent_app_type] => utility [patent_app_number] => 11/618766 [patent_app_country] => US [patent_app_date] => 2006-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6300 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/877/07877666.pdf [firstpage_image] =>[orig_patent_app_number] => 11618766 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618766
Tracking health of integrated circuit structures Dec 29, 2006 Issued
Array ( [id] => 28448 [patent_doc_number] => 07797612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Storage accelerator' [patent_app_type] => utility [patent_app_number] => 11/617966 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7356 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/797/07797612.pdf [firstpage_image] =>[orig_patent_app_number] => 11617966 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/617966
Storage accelerator Dec 28, 2006 Issued
Array ( [id] => 4592882 [patent_doc_number] => 07853858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Efficient CTC encoders and methods' [patent_app_type] => utility [patent_app_number] => 11/617251 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4540 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/853/07853858.pdf [firstpage_image] =>[orig_patent_app_number] => 11617251 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/617251
Efficient CTC encoders and methods Dec 27, 2006 Issued
Array ( [id] => 5017749 [patent_doc_number] => 20070260958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'WIRELESS COMMUNICATION METHOD AND SYSTEM FOR BIT INTERLEAVED CODED MODULATION AND ITERATIVE DECODING' [patent_app_type] => utility [patent_app_number] => 11/617013 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4255 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0260/20070260958.pdf [firstpage_image] =>[orig_patent_app_number] => 11617013 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/617013
Wireless communication method and system for bit interleaved coded modulation and iterative decoding Dec 27, 2006 Issued
Array ( [id] => 305871 [patent_doc_number] => 07536625 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-19 [patent_title] => 'Maintaining data integrity in a data storage system' [patent_app_type] => utility [patent_app_number] => 11/615297 [patent_app_country] => US [patent_app_date] => 2006-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5052 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/536/07536625.pdf [firstpage_image] =>[orig_patent_app_number] => 11615297 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/615297
Maintaining data integrity in a data storage system Dec 21, 2006 Issued
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