Search

Shelly A. Chase

Examiner (ID: 3566, Phone: (571)272-3816 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2784, 2786, 2133, 2112
Total Applications
2020
Issued Applications
1860
Pending Applications
102
Abandoned Applications
74

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6935536 [patent_doc_number] => 20010056559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-27 [patent_title] => 'Accelerating scan test by re-using response data as stimulus data' [patent_app_type] => new [patent_app_number] => 09/864502 [patent_app_country] => US [patent_app_date] => 2001-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13314 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20010056559.pdf [firstpage_image] =>[orig_patent_app_number] => 09864502 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/864502
Accelerating scan test by re-using response data as stimulus data May 23, 2001 Issued
Array ( [id] => 6437039 [patent_doc_number] => 20020176413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Method and apparatus for performing frame interrogation' [patent_app_type] => new [patent_app_number] => 09/862922 [patent_app_country] => US [patent_app_date] => 2001-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5266 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20020176413.pdf [firstpage_image] =>[orig_patent_app_number] => 09862922 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/862922
Method and apparatus for performing frame interrogation May 21, 2001 Issued
Array ( [id] => 1229589 [patent_doc_number] => 06701479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-02 [patent_title] => 'Fast cyclic redundancy check (CRC) generation' [patent_app_type] => B2 [patent_app_number] => 09/858232 [patent_app_country] => US [patent_app_date] => 2001-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2824 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/701/06701479.pdf [firstpage_image] =>[orig_patent_app_number] => 09858232 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/858232
Fast cyclic redundancy check (CRC) generation May 14, 2001 Issued
Array ( [id] => 1201152 [patent_doc_number] => 06728926 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-27 [patent_title] => 'Encoding rate detection method and encoding rate detection device' [patent_app_type] => B1 [patent_app_number] => 09/831636 [patent_app_country] => US [patent_app_date] => 2001-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3586 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/728/06728926.pdf [firstpage_image] =>[orig_patent_app_number] => 09831636 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/831636
Encoding rate detection method and encoding rate detection device May 10, 2001 Issued
Array ( [id] => 1093004 [patent_doc_number] => 06829736 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-07 [patent_title] => 'Method of testing a memory' [patent_app_type] => B1 [patent_app_number] => 09/831657 [patent_app_country] => US [patent_app_date] => 2001-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4056 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/829/06829736.pdf [firstpage_image] =>[orig_patent_app_number] => 09831657 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/831657
Method of testing a memory May 10, 2001 Issued
Array ( [id] => 1234571 [patent_doc_number] => 06697982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-24 [patent_title] => 'Generating netlist test vectors by stripping references to a pseudo input' [patent_app_type] => B2 [patent_app_number] => 09/681598 [patent_app_country] => US [patent_app_date] => 2001-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5376 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/697/06697982.pdf [firstpage_image] =>[orig_patent_app_number] => 09681598 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/681598
Generating netlist test vectors by stripping references to a pseudo input May 3, 2001 Issued
Array ( [id] => 6894561 [patent_doc_number] => 20010016927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Method and apparatus for verifying that data stored in a memory has not been corrupted' [patent_app_type] => new [patent_app_number] => 09/844927 [patent_app_country] => US [patent_app_date] => 2001-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4022 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20010016927.pdf [firstpage_image] =>[orig_patent_app_number] => 09844927 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/844927
Method and apparatus for verifying that data stored in a memory has not been corrupted Apr 25, 2001 Issued
Array ( [id] => 1043272 [patent_doc_number] => 06871309 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-22 [patent_title] => 'Verification of redundant safety functions on a monolithic integrated circuit' [patent_app_type] => utility [patent_app_number] => 09/841775 [patent_app_country] => US [patent_app_date] => 2001-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5340 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/871/06871309.pdf [firstpage_image] =>[orig_patent_app_number] => 09841775 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/841775
Verification of redundant safety functions on a monolithic integrated circuit Apr 23, 2001 Issued
Array ( [id] => 6656449 [patent_doc_number] => 20030009723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Simplified reed-solomon decoding circuit and method of decoding reed-solomon codes' [patent_app_type] => new [patent_app_number] => 09/840228 [patent_app_country] => US [patent_app_date] => 2001-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4045 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20030009723.pdf [firstpage_image] =>[orig_patent_app_number] => 09840228 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/840228
Simplified reed-solomon decoding circuit and method of decoding reed-solomon codes Apr 23, 2001 Abandoned
Array ( [id] => 1134439 [patent_doc_number] => 06792569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Root solver and associated method for solving finite field polynomial equations' [patent_app_type] => B2 [patent_app_number] => 09/842244 [patent_app_country] => US [patent_app_date] => 2001-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4562 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/792/06792569.pdf [firstpage_image] =>[orig_patent_app_number] => 09842244 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/842244
Root solver and associated method for solving finite field polynomial equations Apr 23, 2001 Issued
Array ( [id] => 6426216 [patent_doc_number] => 20020184579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'System and method for recognizing and configuring devices embedded on memory modules' [patent_app_type] => new [patent_app_number] => 09/840724 [patent_app_country] => US [patent_app_date] => 2001-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 17304 [patent_no_of_claims] => 108 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20020184579.pdf [firstpage_image] =>[orig_patent_app_number] => 09840724 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/840724
System and method for recognizing and configuring devices embedded on memory modules Apr 22, 2001 Issued
Array ( [id] => 6143690 [patent_doc_number] => 20020002692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'CRC operation unit and CRC operation method' [patent_app_type] => new [patent_app_number] => 09/833787 [patent_app_country] => US [patent_app_date] => 2001-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5531 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20020002692.pdf [firstpage_image] =>[orig_patent_app_number] => 09833787 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/833787
CRC operation unit and CRC operation method Apr 12, 2001 Issued
Array ( [id] => 6485729 [patent_doc_number] => 20020152434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'SOI cell stability test method' [patent_app_type] => new [patent_app_number] => 09/833724 [patent_app_country] => US [patent_app_date] => 2001-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2795 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20020152434.pdf [firstpage_image] =>[orig_patent_app_number] => 09833724 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/833724
SOI cell stability test method Apr 11, 2001 Issued
Array ( [id] => 6143694 [patent_doc_number] => 20020002694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'Coding apparatus' [patent_app_type] => new [patent_app_number] => 09/833061 [patent_app_country] => US [patent_app_date] => 2001-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6225 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20020002694.pdf [firstpage_image] =>[orig_patent_app_number] => 09833061 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/833061
Coding apparatus capable of high speed operation Apr 11, 2001 Issued
Array ( [id] => 1186467 [patent_doc_number] => 06742152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-25 [patent_title] => 'Parallel scan test software' [patent_app_type] => B2 [patent_app_number] => 09/834023 [patent_app_country] => US [patent_app_date] => 2001-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6508 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/742/06742152.pdf [firstpage_image] =>[orig_patent_app_number] => 09834023 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/834023
Parallel scan test software Apr 10, 2001 Issued
Array ( [id] => 6461550 [patent_doc_number] => 20020178422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Method and apparatus for implementing a time varying trellis' [patent_app_type] => new [patent_app_number] => 09/833141 [patent_app_country] => US [patent_app_date] => 2001-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8980 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20020178422.pdf [firstpage_image] =>[orig_patent_app_number] => 09833141 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/833141
Method and apparatus for implementing a time varying trellis Apr 10, 2001 Abandoned
Array ( [id] => 1186741 [patent_doc_number] => 06738948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-18 [patent_title] => 'Iteration terminating using quality index criteria of turbo codes' [patent_app_type] => B2 [patent_app_number] => 09/829224 [patent_app_country] => US [patent_app_date] => 2001-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4333 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738948.pdf [firstpage_image] =>[orig_patent_app_number] => 09829224 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/829224
Iteration terminating using quality index criteria of turbo codes Apr 8, 2001 Issued
Array ( [id] => 6160303 [patent_doc_number] => 20020147559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Method for testing integrated logic circuits' [patent_app_type] => new [patent_app_number] => 09/681438 [patent_app_country] => US [patent_app_date] => 2001-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3660 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20020147559.pdf [firstpage_image] =>[orig_patent_app_number] => 09681438 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/681438
Method for testing integrated logic circuits Apr 4, 2001 Issued
Array ( [id] => 1167098 [patent_doc_number] => 06772391 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'Hybrid interleaver for turbo codes' [patent_app_type] => B1 [patent_app_number] => 09/806202 [patent_app_country] => US [patent_app_date] => 2001-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 3632 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/772/06772391.pdf [firstpage_image] =>[orig_patent_app_number] => 09806202 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/806202
Hybrid interleaver for turbo codes Mar 26, 2001 Issued
Array ( [id] => 6369709 [patent_doc_number] => 20020059545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Apparatus for testing functions of communication apparatus' [patent_app_type] => new [patent_app_number] => 09/817326 [patent_app_country] => US [patent_app_date] => 2001-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6767 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20020059545.pdf [firstpage_image] =>[orig_patent_app_number] => 09817326 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/817326
Apparatus for testing functions of communication apparatus Mar 25, 2001 Issued
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