Search

Sheng Jen Tsai

Examiner (ID: 15525, Phone: (571)272-4244 , Office: P/2136 )

Most Active Art Unit
2136
Art Unit(s)
2186, 2136, 2139
Total Applications
969
Issued Applications
644
Pending Applications
57
Abandoned Applications
274

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9012375 [patent_doc_number] => 08527694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'Method and apparatus for updating table entries of a ternary content addressable memory' [patent_app_type] => utility [patent_app_number] => 13/158262 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6705 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 635 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13158262 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/158262
Method and apparatus for updating table entries of a ternary content addressable memory Jun 9, 2011 Issued
Array ( [id] => 11391055 [patent_doc_number] => 09552299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-24 [patent_title] => 'Systems and methods for rapid processing and storage of data' [patent_app_type] => utility [patent_app_number] => 13/158161 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5955 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13158161 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/158161
Systems and methods for rapid processing and storage of data Jun 9, 2011 Issued
Array ( [id] => 7492956 [patent_doc_number] => 20110238933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'MEMORY DEVICE AND CONTROLLING METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 13/158126 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 11060 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20110238933.pdf [firstpage_image] =>[orig_patent_app_number] => 13158126 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/158126
Memory device and controlling method of the same Jun 9, 2011 Issued
Array ( [id] => 8872917 [patent_doc_number] => 08468304 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-18 [patent_title] => 'Concentrated parity technique for handling double failures and enabling storage of more than one parity block per stripe on a storage device of a storage array' [patent_app_type] => utility [patent_app_number] => 13/155229 [patent_app_country] => US [patent_app_date] => 2011-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 10326 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13155229 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/155229
Concentrated parity technique for handling double failures and enabling storage of more than one parity block per stripe on a storage device of a storage array Jun 6, 2011 Issued
Array ( [id] => 8149252 [patent_doc_number] => 08166271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-24 [patent_title] => 'Memory controller for setting page length and memory cell density for semiconductor memory' [patent_app_type] => utility [patent_app_number] => 13/154320 [patent_app_country] => US [patent_app_date] => 2011-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 5340 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/166/08166271.pdf [firstpage_image] =>[orig_patent_app_number] => 13154320 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/154320
Memory controller for setting page length and memory cell density for semiconductor memory Jun 5, 2011 Issued
Array ( [id] => 6020267 [patent_doc_number] => 20110225375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'Concurrent Execution of Critical Sections by Eliding Ownership of Locks' [patent_app_type] => utility [patent_app_number] => 13/113432 [patent_app_country] => US [patent_app_date] => 2011-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5533 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20110225375.pdf [firstpage_image] =>[orig_patent_app_number] => 13113432 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/113432
Concurrent Execution of Critical Sections by Eliding Ownership of Locks May 22, 2011 Abandoned
Array ( [id] => 9629874 [patent_doc_number] => 08799568 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-05 [patent_title] => 'Storage device cache' [patent_app_type] => utility [patent_app_number] => 13/109659 [patent_app_country] => US [patent_app_date] => 2011-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 8267 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13109659 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/109659
Storage device cache May 16, 2011 Issued
Array ( [id] => 5939976 [patent_doc_number] => 20110213921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'Command Queuing Smart Storage Transfer Manager for Striping Data to Raw-NAND Flash Modules' [patent_app_type] => utility [patent_app_number] => 13/104257 [patent_app_country] => US [patent_app_date] => 2011-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 12305 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20110213921.pdf [firstpage_image] =>[orig_patent_app_number] => 13104257 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/104257
Command queuing smart storage transfer manager for striping data to raw-NAND flash modules May 9, 2011 Issued
Array ( [id] => 10538738 [patent_doc_number] => 09264380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Method and apparatus for implementing cache coherency of a processor' [patent_app_type] => utility [patent_app_number] => 13/103041 [patent_app_country] => US [patent_app_date] => 2011-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 13465 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13103041 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/103041
Method and apparatus for implementing cache coherency of a processor May 6, 2011 Issued
Array ( [id] => 6067411 [patent_doc_number] => 20110202711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'ADAPTIVE READ AND WRITE SYSTEMS AND METHODS FOR MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 13/095094 [patent_app_country] => US [patent_app_date] => 2011-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5498 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20110202711.pdf [firstpage_image] =>[orig_patent_app_number] => 13095094 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/095094
Adaptive read and write systems and methods for memory cells Apr 26, 2011 Issued
Array ( [id] => 8331550 [patent_doc_number] => 08239626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Storage system that executes performance optimization that maintains redundancy' [patent_app_type] => utility [patent_app_number] => 13/082872 [patent_app_country] => US [patent_app_date] => 2011-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 8682 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13082872 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/082872
Storage system that executes performance optimization that maintains redundancy Apr 7, 2011 Issued
Array ( [id] => 6217607 [patent_doc_number] => 20110138142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'METHOD AND SYSTEM FOR AUTOMATICALLY PRESERVING PERSISTENT STORAGE' [patent_app_type] => utility [patent_app_number] => 13/030872 [patent_app_country] => US [patent_app_date] => 2011-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9719 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20110138142.pdf [firstpage_image] =>[orig_patent_app_number] => 13030872 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/030872
Method and system for automatically preserving persistent storage Feb 17, 2011 Issued
Array ( [id] => 8010743 [patent_doc_number] => 08086789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Flash memory module, storage apparatus using flash memory module as recording medium and address translation table verification method for flash memory module' [patent_app_type] => utility [patent_app_number] => 13/030575 [patent_app_country] => US [patent_app_date] => 2011-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 9501 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/086/08086789.pdf [firstpage_image] =>[orig_patent_app_number] => 13030575 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/030575
Flash memory module, storage apparatus using flash memory module as recording medium and address translation table verification method for flash memory module Feb 17, 2011 Issued
Array ( [id] => 6087905 [patent_doc_number] => 20110145495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'VIRTUAL VOLUME CONTROL METHOD INVOLVING DEVICE STOP' [patent_app_type] => utility [patent_app_number] => 13/028568 [patent_app_country] => US [patent_app_date] => 2011-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 22049 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20110145495.pdf [firstpage_image] =>[orig_patent_app_number] => 13028568 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/028568
Virtual volume control method involving device stop Feb 15, 2011 Issued
Array ( [id] => 6147286 [patent_doc_number] => 20110131363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'MECHANISM FOR REMAPPING POST VIRTUAL MACHINE MEMORY PAGES' [patent_app_type] => utility [patent_app_number] => 13/020124 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2448 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20110131363.pdf [firstpage_image] =>[orig_patent_app_number] => 13020124 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/020124
Mechanism for remapping post virtual machine memory pages Feb 2, 2011 Issued
Array ( [id] => 6147313 [patent_doc_number] => 20110131383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'MODULAR COMMAND STRUCTURE FOR MEMORY AND MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/016396 [patent_app_country] => US [patent_app_date] => 2011-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 10167 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20110131383.pdf [firstpage_image] =>[orig_patent_app_number] => 13016396 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/016396
MODULAR COMMAND STRUCTURE FOR MEMORY AND MEMORY SYSTEM Jan 27, 2011 Abandoned
Array ( [id] => 8120073 [patent_doc_number] => 08161257 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Remote copy system' [patent_app_type] => utility [patent_app_number] => 12/983742 [patent_app_country] => US [patent_app_date] => 2011-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 32 [patent_no_of_words] => 10852 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/161/08161257.pdf [firstpage_image] =>[orig_patent_app_number] => 12983742 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/983742
Remote copy system Jan 2, 2011 Issued
Array ( [id] => 6031365 [patent_doc_number] => 20110055478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'SYSTEM AND METHOD FOR OPTIMIZING INTERCONNECTIONS OF MEMORY DEVICES IN A MULTICHIP MODULE' [patent_app_type] => utility [patent_app_number] => 12/940515 [patent_app_country] => US [patent_app_date] => 2010-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4195 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20110055478.pdf [firstpage_image] =>[orig_patent_app_number] => 12940515 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/940515
System and method for optimizing interconnections of memory devices in a multichip module Nov 4, 2010 Issued
Array ( [id] => 6197965 [patent_doc_number] => 20110029723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-03 [patent_title] => 'Non-Volatile Memory Based Computer Systems' [patent_app_type] => utility [patent_app_number] => 12/885451 [patent_app_country] => US [patent_app_date] => 2010-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6427 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 21 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20110029723.pdf [firstpage_image] =>[orig_patent_app_number] => 12885451 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/885451
Non-Volatile Memory Based Computer Systems Sep 17, 2010 Abandoned
Array ( [id] => 7803632 [patent_doc_number] => 08131916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'Data storage device' [patent_app_type] => utility [patent_app_number] => 12/884506 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3085 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/131/08131916.pdf [firstpage_image] =>[orig_patent_app_number] => 12884506 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884506
Data storage device Sep 16, 2010 Issued
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