Search

Shengjun Wang

Examiner (ID: 18947, Phone: (571)272-0632 , Office: P/1627 )

Most Active Art Unit
1627
Art Unit(s)
1627, 1617
Total Applications
2559
Issued Applications
1079
Pending Applications
238
Abandoned Applications
1248

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11087455 [patent_doc_number] => 20160284423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/146503 [patent_app_country] => US [patent_app_date] => 2016-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5883 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15146503 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/146503
Semiconductor memory apparatus May 3, 2016 Issued
Array ( [id] => 11027466 [patent_doc_number] => 20160224422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'ACHIEVING STORAGE COMPLIANCE IN A DISPERSED STORAGE NETWORK' [patent_app_type] => utility [patent_app_number] => 15/095558 [patent_app_country] => US [patent_app_date] => 2016-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 62 [patent_figures_cnt] => 62 [patent_no_of_words] => 42130 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15095558 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/095558
Achieving storage compliance in a dispersed storage network Apr 10, 2016 Issued
Array ( [id] => 13767397 [patent_doc_number] => 10176040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => Error correction code (ECC) operations in memory [patent_app_type] => utility [patent_app_number] => 15/091112 [patent_app_country] => US [patent_app_date] => 2016-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 12585 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15091112 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/091112
Error correction code (ECC) operations in memory Apr 4, 2016 Issued
Array ( [id] => 11931617 [patent_doc_number] => 09798617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-24 [patent_title] => 'Combined asynchronous and synchronous fountain code storage in an object store' [patent_app_type] => utility [patent_app_number] => 15/089968 [patent_app_country] => US [patent_app_date] => 2016-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7967 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089968 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/089968
Combined asynchronous and synchronous fountain code storage in an object store Apr 3, 2016 Issued
Array ( [id] => 13292973 [patent_doc_number] => 10157685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Memory device and operating method thereof [patent_app_type] => utility [patent_app_number] => 15/089230 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7344 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089230 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/089230
Memory device and operating method thereof Mar 31, 2016 Issued
Array ( [id] => 11982062 [patent_doc_number] => 20170286216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'ENERGY EFFICIENT READ/WRITE SUPPORT FOR A PROTECTED MEMORY' [patent_app_type] => utility [patent_app_number] => 15/089340 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9686 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089340 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/089340
ENERGY EFFICIENT READ/WRITE SUPPORT FOR A PROTECTED MEMORY Mar 31, 2016 Abandoned
Array ( [id] => 11984542 [patent_doc_number] => 20170288697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'LDPC SHUFFLE DECODER WITH INITIALIZATION CIRCUIT COMPRISING ORDERED SET MEMORY' [patent_app_type] => utility [patent_app_number] => 15/088055 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1585 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15088055 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/088055
LDPC SHUFFLE DECODER WITH INITIALIZATION CIRCUIT COMPRISING ORDERED SET MEMORY Mar 30, 2016 Abandoned
Array ( [id] => 13120209 [patent_doc_number] => 10078458 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-09-18 [patent_title] => Method and system for adaptively migrating data in solid state memory [patent_app_type] => utility [patent_app_number] => 15/087671 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 8240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15087671 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/087671
Method and system for adaptively migrating data in solid state memory Mar 30, 2016 Issued
Array ( [id] => 13668935 [patent_doc_number] => 10164656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Bit flipping algorithm for providing soft information during hard decision hard decoding [patent_app_type] => utility [patent_app_number] => 15/086006 [patent_app_country] => US [patent_app_date] => 2016-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1535 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15086006 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/086006
Bit flipping algorithm for providing soft information during hard decision hard decoding Mar 29, 2016 Issued
Array ( [id] => 11097445 [patent_doc_number] => 20160294414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'CHIP AND METHOD FOR DETECTING A CHANGE OF A STORED DATA VECTOR' [patent_app_type] => utility [patent_app_number] => 15/084533 [patent_app_country] => US [patent_app_date] => 2016-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4425 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15084533 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/084533
Chip and method for detecting a change of a stored data vector Mar 29, 2016 Issued
Array ( [id] => 11012515 [patent_doc_number] => 20160209468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'SEMICONDUCTOR DEVICE, PHYSICAL QUANTITY SENSOR, ELECTRONIC APPARATUS, AND MOVING OBJECT' [patent_app_type] => utility [patent_app_number] => 15/079429 [patent_app_country] => US [patent_app_date] => 2016-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11871 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15079429 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/079429
Semiconductor device, physical quantity sensor, electronic apparatus, and moving object Mar 23, 2016 Issued
Array ( [id] => 13891535 [patent_doc_number] => 10198315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Non-volatile memory with corruption recovery [patent_app_type] => utility [patent_app_number] => 15/056070 [patent_app_country] => US [patent_app_date] => 2016-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 13739 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15056070 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/056070
Non-volatile memory with corruption recovery Feb 28, 2016 Issued
Array ( [id] => 11088506 [patent_doc_number] => 20160285474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'STORAGE SYSTEM, INFORMATION PROCESSOR, AND COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN PROGRAM FOR GENERATING PARITY' [patent_app_type] => utility [patent_app_number] => 15/055677 [patent_app_country] => US [patent_app_date] => 2016-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5629 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15055677 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/055677
Storage system, information processor, and computer-readable recording medium having stored therein program for generating parity Feb 28, 2016 Issued
Array ( [id] => 12550977 [patent_doc_number] => 10013208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-03 [patent_title] => Method for writing in an EEPROM memory and corresponding memory [patent_app_type] => utility [patent_app_number] => 15/055546 [patent_app_country] => US [patent_app_date] => 2016-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10126 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15055546 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/055546
Method for writing in an EEPROM memory and corresponding memory Feb 26, 2016 Issued
Array ( [id] => 11556183 [patent_doc_number] => 20170102429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-13 [patent_title] => 'TEST APPARATUS, TEST SIGNAL SUPPLY APPARATUS, TEST METHOD, AND COMPUTER READABLE MEDIUM' [patent_app_type] => utility [patent_app_number] => 15/054145 [patent_app_country] => US [patent_app_date] => 2016-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15054145 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/054145
TEST APPARATUS, TEST SIGNAL SUPPLY APPARATUS, TEST METHOD, AND COMPUTER READABLE MEDIUM Feb 25, 2016 Abandoned
Array ( [id] => 11745711 [patent_doc_number] => 20170199784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'METHOD OF DATA RECOVERY WHEN ERRORS FAILING TO BE CORRECTED THROUGH ECC OCCUR TO NAND FLASH' [patent_app_type] => utility [patent_app_number] => 15/318948 [patent_app_country] => US [patent_app_date] => 2016-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1629 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15318948 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/318948
METHOD OF DATA RECOVERY WHEN ERRORS FAILING TO BE CORRECTED THROUGH ECC OCCUR TO NAND FLASH Jan 30, 2016 Abandoned
Array ( [id] => 11124160 [patent_doc_number] => 20160321134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'ERROR CORRECTION IN SOLID STATE DRIVES (SSD)' [patent_app_type] => utility [patent_app_number] => 15/007686 [patent_app_country] => US [patent_app_date] => 2016-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4445 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15007686 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/007686
Error correction in solid state drives (SSD) Jan 26, 2016 Issued
Array ( [id] => 11051483 [patent_doc_number] => 20160248443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'TRANSMITTING METHOD AND TRANSMITTING APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/994986 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 76 [patent_figures_cnt] => 76 [patent_no_of_words] => 76894 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14994986 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/994986
Transmitting method and transmitting apparatus Jan 12, 2016 Issued
Array ( [id] => 11410081 [patent_doc_number] => 09557381 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-31 [patent_title] => 'Physically aware insertion of diagnostic circuit elements' [patent_app_type] => utility [patent_app_number] => 14/987824 [patent_app_country] => US [patent_app_date] => 2016-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6201 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14987824 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/987824
Physically aware insertion of diagnostic circuit elements Jan 4, 2016 Issued
Array ( [id] => 10752168 [patent_doc_number] => 20160098321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-07 [patent_title] => 'Efficient Memory Architecture for Low Density Parity Check Decoding' [patent_app_type] => utility [patent_app_number] => 14/967653 [patent_app_country] => US [patent_app_date] => 2015-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4631 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14967653 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/967653
Efficient Memory Architecture for Low Density Parity Check Decoding Dec 13, 2015 Abandoned
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