Search

Shengjun Wang

Examiner (ID: 18947, Phone: (571)272-0632 , Office: P/1627 )

Most Active Art Unit
1627
Art Unit(s)
1627, 1617
Total Applications
2559
Issued Applications
1079
Pending Applications
238
Abandoned Applications
1248

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10111391 [patent_doc_number] => 09146806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-29 [patent_title] => 'Method for processing transmission errors, in particular noise, during a contactless communication between a card and a reader' [patent_app_type] => utility [patent_app_number] => 14/154570 [patent_app_country] => US [patent_app_date] => 2014-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5934 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14154570 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/154570
Method for processing transmission errors, in particular noise, during a contactless communication between a card and a reader Jan 13, 2014 Issued
Array ( [id] => 10314230 [patent_doc_number] => 20150199233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-16 [patent_title] => 'Memory ECC with Hard and Soft Error Detection and Management' [patent_app_type] => utility [patent_app_number] => 14/152926 [patent_app_country] => US [patent_app_date] => 2014-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6995 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14152926 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/152926
Memory ECC with hard and soft error detection and management Jan 9, 2014 Issued
Array ( [id] => 10250036 [patent_doc_number] => 20150135032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-14 [patent_title] => 'Detection/Erasure of Random Write Errors Using Converged Hard Decisions' [patent_app_type] => utility [patent_app_number] => 14/150810 [patent_app_country] => US [patent_app_date] => 2014-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5521 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14150810 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/150810
Detection/erasure of random write errors using converged hard decisions Jan 8, 2014 Issued
Array ( [id] => 9596177 [patent_doc_number] => 20140192857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'ENHANCED BUFFERING OF SOFT DECODING METRICS' [patent_app_type] => utility [patent_app_number] => 14/147540 [patent_app_country] => US [patent_app_date] => 2014-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4408 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14147540 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/147540
Enhanced buffering of soft decoding metrics Jan 4, 2014 Issued
Array ( [id] => 10309965 [patent_doc_number] => 20150194967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-09 [patent_title] => 'Coarse Data Aligner' [patent_app_type] => utility [patent_app_number] => 14/146852 [patent_app_country] => US [patent_app_date] => 2014-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5293 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14146852 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/146852
Coarse data aligner Jan 2, 2014 Issued
Array ( [id] => 10163695 [patent_doc_number] => 09194916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Method with system and program product for prioritizing clock domains for testing of integrated circuit designs' [patent_app_type] => utility [patent_app_number] => 14/146056 [patent_app_country] => US [patent_app_date] => 2014-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7502 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14146056 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/146056
Method with system and program product for prioritizing clock domains for testing of integrated circuit designs Jan 1, 2014 Issued
Array ( [id] => 11775160 [patent_doc_number] => 09384089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Systems and methods for proactively refreshing nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 14/144957 [patent_app_country] => US [patent_app_date] => 2013-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4724 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14144957 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/144957
Systems and methods for proactively refreshing nonvolatile memory Dec 30, 2013 Issued
Array ( [id] => 9451782 [patent_doc_number] => 20140122952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'BOUNDARY SCAN CHAIN FOR STACKED MEMORY' [patent_app_type] => utility [patent_app_number] => 14/145478 [patent_app_country] => US [patent_app_date] => 2013-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6153 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14145478 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/145478
Boundary scan chain for stacked memory Dec 30, 2013 Issued
Array ( [id] => 9866745 [patent_doc_number] => 20150046764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-12 [patent_title] => 'RECORDING AND REPRODUCING APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/142096 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4174 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142096 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/142096
RECORDING AND REPRODUCING APPARATUS Dec 26, 2013 Abandoned
Array ( [id] => 10302440 [patent_doc_number] => 20150187439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'INTEGRATED CIRCUIT DEFECT DETECTION AND REPAIR' [patent_app_type] => utility [patent_app_number] => 14/141239 [patent_app_country] => US [patent_app_date] => 2013-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 29197 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141239 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/141239
Integrated circuit defect detection and repair Dec 25, 2013 Issued
Array ( [id] => 13756493 [patent_doc_number] => 10171206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Methods and apparatuses for reframing and retransmission of datagram segments [patent_app_type] => utility [patent_app_number] => 14/653863 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 9510 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14653863 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/653863
Methods and apparatuses for reframing and retransmission of datagram segments Dec 19, 2013 Issued
Array ( [id] => 10293151 [patent_doc_number] => 20150178150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'Techniques for Assessing Pass/Fail Status of Non-Volatile Memory' [patent_app_type] => utility [patent_app_number] => 14/135663 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14135663 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/135663
Techniques for assessing pass/fail status of non-volatile memory Dec 19, 2013 Issued
Array ( [id] => 9548726 [patent_doc_number] => 20140173374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'METHODS AND APPARATUS FOR ERROR CODING' [patent_app_type] => utility [patent_app_number] => 14/108759 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12180 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14108759 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/108759
METHODS AND APPARATUS FOR ERROR CODING Dec 16, 2013 Abandoned
Array ( [id] => 10033800 [patent_doc_number] => 09075112 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-07 [patent_title] => 'Clock control circuitry and methods of utilizing the clock control circuitry' [patent_app_type] => utility [patent_app_number] => 14/108063 [patent_app_country] => US [patent_app_date] => 2013-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5543 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14108063 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/108063
Clock control circuitry and methods of utilizing the clock control circuitry Dec 15, 2013 Issued
Array ( [id] => 10618411 [patent_doc_number] => 09337866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Apparatus for processing signals carrying modulation-encoded parity bits' [patent_app_type] => utility [patent_app_number] => 14/104368 [patent_app_country] => US [patent_app_date] => 2013-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 19045 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14104368 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/104368
Apparatus for processing signals carrying modulation-encoded parity bits Dec 11, 2013 Issued
Array ( [id] => 9541075 [patent_doc_number] => 20140165722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'SENSOR DEVICE PROVIDED WITH A CIRCUIT FOR DETECTION OF SINGLE OR MULTIPLE EVENTS FOR GENERATING CORRESPONDING INTERRUPT SIGNALS' [patent_app_type] => utility [patent_app_number] => 14/104873 [patent_app_country] => US [patent_app_date] => 2013-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5540 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14104873 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/104873
Sensor device provided with a circuit for detection of single or multiple events for generating corresponding interrupt signals Dec 11, 2013 Issued
Array ( [id] => 10536637 [patent_doc_number] => 09262267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Error correction in solid state drives (SSD)' [patent_app_type] => utility [patent_app_number] => 14/093936 [patent_app_country] => US [patent_app_date] => 2013-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4413 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14093936 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/093936
Error correction in solid state drives (SSD) Dec 1, 2013 Issued
Array ( [id] => 9599195 [patent_doc_number] => 20140195875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'ACHIEVING STORAGE COMPLIANCE IN A DISPERSED STORAGE NETWORK' [patent_app_type] => utility [patent_app_number] => 14/088794 [patent_app_country] => US [patent_app_date] => 2013-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 62 [patent_figures_cnt] => 62 [patent_no_of_words] => 41630 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14088794 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/088794
Achieving storage compliance in a dispersed storage network Nov 24, 2013 Issued
Array ( [id] => 10093757 [patent_doc_number] => 09130595 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-08 [patent_title] => 'System and method for acceleration effect correction using turbo-encoded data with cyclic redundancy check' [patent_app_type] => utility [patent_app_number] => 14/073950 [patent_app_country] => US [patent_app_date] => 2013-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4195 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14073950 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/073950
System and method for acceleration effect correction using turbo-encoded data with cyclic redundancy check Nov 6, 2013 Issued
Array ( [id] => 10589564 [patent_doc_number] => 09311181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Memory controller changing partial data in memory device and method for changing partial data thereof' [patent_app_type] => utility [patent_app_number] => 14/071771 [patent_app_country] => US [patent_app_date] => 2013-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 8773 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14071771 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/071771
Memory controller changing partial data in memory device and method for changing partial data thereof Nov 4, 2013 Issued
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