Shengjun Wang

Array ( [id] => 10003121 [patent_doc_number] => 09047214 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-06-02 [patent_title] => 'System and method for tolerating a failed page in a flash device' [patent_app_type] => utility [patent_app_number] => 13/477635 [patent_app_country] => US [patent_app_date] => 2012-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 37159 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13477635 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9352422 [patent_doc_number] => 08671326 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-03-11 [patent_title] => 'Concatenated codes for recovering stored data' [patent_app_type] => utility [patent_app_number] => 13/471747 [patent_app_country] => US [patent_app_date] => 2012-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 10530 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13471747 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8985212 [patent_doc_number] => 08516342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Triple parity technique for enabling efficient recovery from triple failures in a storage array' [patent_app_type] => utility [patent_app_number] => 13/472133 [patent_app_country] => US [patent_app_date] => 2012-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 16105 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13472133 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8380898 [patent_doc_number] => 20120224523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING MULTIMEDIA BROADCAST MULTICAST SERVICES VIA A DEDICATED DOWNLINK CARRIER' [patent_app_type] => utility [patent_app_number] => 13/470838 [patent_app_country] => US [patent_app_date] => 2012-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2938 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13470838 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8763308 [patent_doc_number] => 08423847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-16 [patent_title] => 'Microcontroller for logic built-in self test (LBIST)' [patent_app_type] => utility [patent_app_number] => 13/469604 [patent_app_country] => US [patent_app_date] => 2012-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4921 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13469604 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8337368 [patent_doc_number] => 20120204072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'LOW POWER SCAN & DELAY TEST METHOD AND APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/453501 [patent_app_country] => US [patent_app_date] => 2012-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3671 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13453501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9465473 [patent_doc_number] => 20140129900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-08 [patent_title] => 'METHOD AND DEVICE FOR INCREASING THE DATA TRANSMISSION CAPACITY IN A SERIAL BUS SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/009475 [patent_app_country] => US [patent_app_date] => 2012-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7448 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14009475 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9006249 [patent_doc_number] => 20130227374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'ERASURE CORRECTION USING SINGLE ERROR DETECTION PARITY' [patent_app_type] => utility [patent_app_number] => 13/426980 [patent_app_country] => US [patent_app_date] => 2012-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13426980 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8546452 [patent_doc_number] => 08321755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Systems and methods for efficient data storage' [patent_app_type] => utility [patent_app_number] => 13/422742 [patent_app_country] => US [patent_app_date] => 2012-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7414 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13422742 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9044246 [patent_doc_number] => 20130246884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'METHOD AND APPARATUS FOR WIRELESS DATA TRANSMISSION SUBJECT TO PERIODIC SIGNAL BLOCKAGES' [patent_app_type] => utility [patent_app_number] => 13/422534 [patent_app_country] => US [patent_app_date] => 2012-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7925 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13422534 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8424697 [patent_doc_number] => 08281195 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-10-02 [patent_title] => 'Scan architecture for full custom blocks' [patent_app_type] => utility [patent_app_number] => 13/416712 [patent_app_country] => US [patent_app_date] => 2012-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 14777 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13416712 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9236038 [patent_doc_number] => 08601354 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-03 [patent_title] => 'Methods and apparatus for identification of likely errors in data blocks' [patent_app_type] => utility [patent_app_number] => 13/407901 [patent_app_country] => US [patent_app_date] => 2012-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8295 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13407901 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8360935 [patent_doc_number] => 20120216092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'REPETITIVE TRANSMISSIONS IN MULTI-CARRIER BASED WIRELESS ACCESS TECHNIQUES' [patent_app_type] => utility [patent_app_number] => 13/401831 [patent_app_country] => US [patent_app_date] => 2012-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6299 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13401831 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8242576 [patent_doc_number] => 20120151305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'FILTERING METHOD, SYSTEM AND EQUIPMENT' [patent_app_type] => utility [patent_app_number] => 13/399170 [patent_app_country] => US [patent_app_date] => 2012-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5655 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13399170 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8952797 [patent_doc_number] => 20130198578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => 'Maximizing Re-Use of External Pins of an Integrated Circuit for Testing' [patent_app_type] => utility [patent_app_number] => 13/363604 [patent_app_country] => US [patent_app_date] => 2012-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5985 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13363604 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8594950 [patent_doc_number] => 08352833 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'System and method for data read of a synchronous serial interface NAND' [patent_app_type] => utility [patent_app_number] => 13/357536 [patent_app_country] => US [patent_app_date] => 2012-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3917 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13357536 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9800841 [patent_doc_number] => 20150012785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-08 [patent_title] => 'Advanced Programming Verification Schemes for Analog Memory Cells' [patent_app_type] => utility [patent_app_number] => 13/356694 [patent_app_country] => US [patent_app_date] => 2012-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7640 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13356694 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9257862 [patent_doc_number] => 08621303 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-31 [patent_title] => 'Clock control circuitry and methods of utilizing the clock control circuitry' [patent_app_type] => utility [patent_app_number] => 13/354706 [patent_app_country] => US [patent_app_date] => 2012-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5568 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13354706 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8929846 [patent_doc_number] => 20130185606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-18 [patent_title] => 'SYSTEMS AND METHODS FOR PROACTIVELY REFRESHING NONVOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/352998 [patent_app_country] => US [patent_app_date] => 2012-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4691 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13352998 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8176750 [patent_doc_number] => 20120110399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'ERROR SCANNING IN FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 13/346538 [patent_app_country] => US [patent_app_date] => 2012-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6631 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20120110399.pdf [firstpage_image] =>[orig_patent_app_number] => 13346538 [rel_patent_id] =>[rel_patent_doc_number] =>)