
Sherrod L. Keaton
Examiner (ID: 8765, Phone: (571)270-1697 , Office: P/2142 )
| Most Active Art Unit | 2142 |
| Art Unit(s) | 2178, 2148, 2174, 2142, 2175, 2173 |
| Total Applications | 605 |
| Issued Applications | 290 |
| Pending Applications | 64 |
| Abandoned Applications | 274 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6553878
[patent_doc_number] => 20100205362
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-12
[patent_title] => 'Cache Control in a Non-Volatile Memory Device'
[patent_app_type] => utility
[patent_app_number] => 12/767094
[patent_app_country] => US
[patent_app_date] => 2010-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5105
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0205/20100205362.pdf
[firstpage_image] =>[orig_patent_app_number] => 12767094
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/767094 | Flash memory and method for a cache portion storing less bit per cell than a main portion | Apr 25, 2010 | Issued |
Array
(
[id] => 8010811
[patent_doc_number] => 08086823
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-12-27
[patent_title] => 'Method for speeding up page table address update on virtual machine'
[patent_app_type] => utility
[patent_app_number] => 12/766430
[patent_app_country] => US
[patent_app_date] => 2010-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 41
[patent_no_of_words] => 17542
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 265
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/086/08086823.pdf
[firstpage_image] =>[orig_patent_app_number] => 12766430
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/766430 | Method for speeding up page table address update on virtual machine | Apr 22, 2010 | Issued |
Array
(
[id] => 4539751
[patent_doc_number] => 07953941
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-31
[patent_title] => 'Data processor with memory controller having burst access operation'
[patent_app_type] => utility
[patent_app_number] => 12/728200
[patent_app_country] => US
[patent_app_date] => 2010-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 7286
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 486
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/953/07953941.pdf
[firstpage_image] =>[orig_patent_app_number] => 12728200
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/728200 | Data processor with memory controller having burst access operation | Mar 19, 2010 | Issued |
Array
(
[id] => 4510665
[patent_doc_number] => 07949828
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-24
[patent_title] => 'Data storage control on storage devices'
[patent_app_type] => utility
[patent_app_number] => 12/704463
[patent_app_country] => US
[patent_app_date] => 2010-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 35
[patent_no_of_words] => 10673
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/949/07949828.pdf
[firstpage_image] =>[orig_patent_app_number] => 12704463
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/704463 | Data storage control on storage devices | Feb 10, 2010 | Issued |
Array
(
[id] => 6181779
[patent_doc_number] => 20110179232
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-21
[patent_title] => 'METHOD AND SYSTEM FOR ALLOCATING DATA OBJECTS FOR EFFICIENT READS IN A MASS STORAGE SUBSYSTEM'
[patent_app_type] => utility
[patent_app_number] => 12/690849
[patent_app_country] => US
[patent_app_date] => 2010-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8433
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20110179232.pdf
[firstpage_image] =>[orig_patent_app_number] => 12690849
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/690849 | Method and system for allocating data objects for efficient reads in a mass storage subsystem | Jan 19, 2010 | Issued |
Array
(
[id] => 8799472
[patent_doc_number] => 08438357
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-05-07
[patent_title] => 'Method and apparatus for calculating number of memory access cycles when transferring data to or from a memory'
[patent_app_type] => utility
[patent_app_number] => 12/690856
[patent_app_country] => US
[patent_app_date] => 2010-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 18
[patent_no_of_words] => 20778
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12690856
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/690856 | Method and apparatus for calculating number of memory access cycles when transferring data to or from a memory | Jan 19, 2010 | Issued |
Array
(
[id] => 6181861
[patent_doc_number] => 20110179250
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-21
[patent_title] => 'I/O CONVERSION METHOD AND APPARATUS FOR STORAGE SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 12/690404
[patent_app_country] => US
[patent_app_date] => 2010-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 12334
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20110179250.pdf
[firstpage_image] =>[orig_patent_app_number] => 12690404
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/690404 | I/O conversion method and apparatus for storage system | Jan 19, 2010 | Issued |
Array
(
[id] => 6234228
[patent_doc_number] => 20100185831
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-22
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND ADDRESS TRANSLATION METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/689625
[patent_app_country] => US
[patent_app_date] => 2010-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5033
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0185/20100185831.pdf
[firstpage_image] =>[orig_patent_app_number] => 12689625
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/689625 | SEMICONDUCTOR INTEGRATED CIRCUIT AND ADDRESS TRANSLATION METHOD | Jan 18, 2010 | Abandoned |
Array
(
[id] => 8594825
[patent_doc_number] => 08352708
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-01-08
[patent_title] => 'Parallel read functional unit for microprocessors'
[patent_app_type] => utility
[patent_app_number] => 12/690040
[patent_app_country] => US
[patent_app_date] => 2010-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 8352
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 244
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12690040
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/690040 | Parallel read functional unit for microprocessors | Jan 18, 2010 | Issued |
Array
(
[id] => 6395809
[patent_doc_number] => 20100318725
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-16
[patent_title] => 'Multi-Processor System Having Function of Preventing Data Loss During Power-Off in Memory Link Architecture'
[patent_app_type] => utility
[patent_app_number] => 12/689854
[patent_app_country] => US
[patent_app_date] => 2010-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5260
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0318/20100318725.pdf
[firstpage_image] =>[orig_patent_app_number] => 12689854
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/689854 | Multi-Processor System Having Function of Preventing Data Loss During Power-Off in Memory Link Architecture | Jan 18, 2010 | Abandoned |
Array
(
[id] => 8366562
[patent_doc_number] => 08255643
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-28
[patent_title] => 'Memory system and data processing method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/656131
[patent_app_country] => US
[patent_app_date] => 2010-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 6520
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12656131
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/656131 | Memory system and data processing method thereof | Jan 18, 2010 | Issued |
Array
(
[id] => 8530599
[patent_doc_number] => 08307182
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-11-06
[patent_title] => 'Method and apparatus for transferring data to or from a memory'
[patent_app_type] => utility
[patent_app_number] => 12/689604
[patent_app_country] => US
[patent_app_date] => 2010-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 18
[patent_no_of_words] => 20990
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12689604
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/689604 | Method and apparatus for transferring data to or from a memory | Jan 18, 2010 | Issued |
Array
(
[id] => 6217549
[patent_doc_number] => 20110138108
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-09
[patent_title] => 'METHOD OF ACTIVE FLASH MANAGEMENT, AND ASSOCIATED MEMORY DEVICE AND CONTROLLER THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/690082
[patent_app_country] => US
[patent_app_date] => 2010-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3764
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20110138108.pdf
[firstpage_image] =>[orig_patent_app_number] => 12690082
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/690082 | Method of active flash management, and associated memory device and controller thereof | Jan 18, 2010 | Issued |
Array
(
[id] => 6234172
[patent_doc_number] => 20100185807
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-22
[patent_title] => 'DATA STORAGE PROCESSING METHOD, DATA SEARCHING METHOD AND DEVICES THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/689712
[patent_app_country] => US
[patent_app_date] => 2010-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5104
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0185/20100185807.pdf
[firstpage_image] =>[orig_patent_app_number] => 12689712
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/689712 | Data storage processing method, data searching method and devices thereof | Jan 18, 2010 | Issued |
Array
(
[id] => 8331578
[patent_doc_number] => 08239655
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-07
[patent_title] => 'Virtual target addressing during direct data access via VF of IO storage adapter'
[patent_app_type] => utility
[patent_app_number] => 12/689152
[patent_app_country] => US
[patent_app_date] => 2010-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 14555
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12689152
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/689152 | Virtual target addressing during direct data access via VF of IO storage adapter | Jan 17, 2010 | Issued |
Array
(
[id] => 10901420
[patent_doc_number] => 08924661
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-12-30
[patent_title] => 'Memory system including a controller and processors associated with memory devices'
[patent_app_type] => utility
[patent_app_number] => 12/688883
[patent_app_country] => US
[patent_app_date] => 2010-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 9809
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 266
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12688883
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/688883 | Memory system including a controller and processors associated with memory devices | Jan 16, 2010 | Issued |
Array
(
[id] => 7770306
[patent_doc_number] => 20120036311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-09
[patent_title] => 'CACHE AND DISK MANAGEMENT METHOD, AND A CONTROLLER USING THE METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/264275
[patent_app_country] => US
[patent_app_date] => 2009-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5461
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0036/20120036311.pdf
[firstpage_image] =>[orig_patent_app_number] => 13264275
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/264275 | Cache and disk management method, and a controller using the method | Dec 22, 2009 | Issued |
Array
(
[id] => 6409134
[patent_doc_number] => 20100180090
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-15
[patent_title] => 'Garbage collection barrier with direct user mode traps'
[patent_app_type] => utility
[patent_app_number] => 12/592579
[patent_app_country] => US
[patent_app_date] => 2009-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5410
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0180/20100180090.pdf
[firstpage_image] =>[orig_patent_app_number] => 12592579
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/592579 | Garbage collection barrier with direct user mode traps | Nov 24, 2009 | Issued |
Array
(
[id] => 7529947
[patent_doc_number] => 08046553
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-10-25
[patent_title] => 'Faster recovery mechanism of validated continuous data protection (CDP) time image'
[patent_app_type] => utility
[patent_app_number] => 12/609886
[patent_app_country] => US
[patent_app_date] => 2009-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 5761
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/046/08046553.pdf
[firstpage_image] =>[orig_patent_app_number] => 12609886
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/609886 | Faster recovery mechanism of validated continuous data protection (CDP) time image | Oct 29, 2009 | Issued |
Array
(
[id] => 7759740
[patent_doc_number] => 20120030415
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-02
[patent_title] => 'MASS-STORAGE SYSTEM UTILIZING AUXILIARY SOLID-STATE STORAGE SUBSYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/263003
[patent_app_country] => US
[patent_app_date] => 2009-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 19839
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0030/20120030415.pdf
[firstpage_image] =>[orig_patent_app_number] => 13263003
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/263003 | Mass-storage system utilizing auxiliary solid-state storage subsystem | Oct 26, 2009 | Issued |