
Sherrod L. Keaton
Examiner (ID: 8765, Phone: (571)270-1697 , Office: P/2142 )
| Most Active Art Unit | 2142 |
| Art Unit(s) | 2178, 2148, 2174, 2142, 2175, 2173 |
| Total Applications | 605 |
| Issued Applications | 290 |
| Pending Applications | 64 |
| Abandoned Applications | 274 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8787012
[patent_doc_number] => 08433866
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-30
[patent_title] => 'Remote copy system and remote copy control method in which a copy pair is changed from a first consistency group to a second consistency group (STG)'
[patent_app_type] => utility
[patent_app_number] => 12/673253
[patent_app_country] => US
[patent_app_date] => 2009-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 36
[patent_no_of_words] => 11965
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12673253
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/673253 | Remote copy system and remote copy control method in which a copy pair is changed from a first consistency group to a second consistency group (STG) | Oct 22, 2009 | Issued |
Array
(
[id] => 6368460
[patent_doc_number] => 20100088484
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-08
[patent_title] => 'SYNCHRONOUS FLASH MEMORY WITH STATUS BURST OUTPUT'
[patent_app_type] => utility
[patent_app_number] => 12/570570
[patent_app_country] => US
[patent_app_date] => 2009-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 48
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[patent_no_of_words] => 14975
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[pdf_file] => publications/A1/0088/20100088484.pdf
[firstpage_image] =>[orig_patent_app_number] => 12570570
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/570570 | Synchronous flash memory with status burst output | Sep 29, 2009 | Issued |
Array
(
[id] => 6395888
[patent_doc_number] => 20100318738
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-16
[patent_title] => 'HARD DISK SYSTEM AND METHOD FOR ACCESSING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/509498
[patent_app_country] => US
[patent_app_date] => 2009-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[firstpage_image] =>[orig_patent_app_number] => 12509498
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/509498 | HARD DISK SYSTEM AND METHOD FOR ACCESSING THE SAME | Jul 26, 2009 | Abandoned |
Array
(
[id] => 6153467
[patent_doc_number] => 20110022780
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-27
[patent_title] => 'RESTORE INDEX PAGE'
[patent_app_type] => utility
[patent_app_number] => 12/509071
[patent_app_country] => US
[patent_app_date] => 2009-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[pdf_file] => publications/A1/0022/20110022780.pdf
[firstpage_image] =>[orig_patent_app_number] => 12509071
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/509071 | Restore index page | Jul 23, 2009 | Issued |
Array
(
[id] => 8149216
[patent_doc_number] => 08166233
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-04-24
[patent_title] => 'Garbage collection for solid state disks'
[patent_app_type] => utility
[patent_app_number] => 12/508879
[patent_app_country] => US
[patent_app_date] => 2009-07-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/08/166/08166233.pdf
[firstpage_image] =>[orig_patent_app_number] => 12508879
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/508879 | Garbage collection for solid state disks | Jul 23, 2009 | Issued |
Array
(
[id] => 6154401
[patent_doc_number] => 20110023027
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-27
[patent_title] => 'I/O MEMORY MANAGEMENT UNIT INCLUDING MULTILEVEL ADDRESS TRANSLATION FOR I/O AND COMPUTATION OFFLOAD'
[patent_app_type] => utility
[patent_app_number] => 12/508882
[patent_app_country] => US
[patent_app_date] => 2009-07-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0023/20110023027.pdf
[firstpage_image] =>[orig_patent_app_number] => 12508882
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/508882 | I/O memory management unit including multilevel address translation for I/O and computation offload | Jul 23, 2009 | Issued |
Array
(
[id] => 6491040
[patent_doc_number] => 20100042777
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-18
[patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING MEMORY CELL HAVING CHARGE ACCUMULATION LAYER AND CONTROL GATE AND DATA WRITE METHOD FOR THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/508992
[patent_app_country] => US
[patent_app_date] => 2009-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[pdf_file] => publications/A1/0042/20100042777.pdf
[firstpage_image] =>[orig_patent_app_number] => 12508992
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/508992 | SEMICONDUCTOR DEVICE INCLUDING MEMORY CELL HAVING CHARGE ACCUMULATION LAYER AND CONTROL GATE AND DATA WRITE METHOD FOR THE SAME | Jul 23, 2009 | Abandoned |
Array
(
[id] => 8752046
[patent_doc_number] => 08417889
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-09
[patent_title] => 'Two partition accelerator and application of tiered flash to cache hierarchy in partition acceleration'
[patent_app_type] => utility
[patent_app_number] => 12/508621
[patent_app_country] => US
[patent_app_date] => 2009-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/508621 | Two partition accelerator and application of tiered flash to cache hierarchy in partition acceleration | Jul 23, 2009 | Issued |
Array
(
[id] => 6331134
[patent_doc_number] => 20100115214
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-06
[patent_title] => 'BRIDGING DEVICE HAVING A CONFIGURABLE VIRTUAL PAGE SIZE'
[patent_app_type] => utility
[patent_app_number] => 12/508926
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[patent_app_date] => 2009-07-24
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/508926 | Bridging device having a configurable virtual page size | Jul 23, 2009 | Issued |
Array
(
[id] => 11359197
[patent_doc_number] => 09535849
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-03
[patent_title] => 'IOMMU using two-level address translation for I/O and computation offload devices on a peripheral interconnect'
[patent_app_type] => utility
[patent_app_number] => 12/508890
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Array
(
[id] => 8945933
[patent_doc_number] => 08499120
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-30
[patent_title] => 'User selectable caching management'
[patent_app_type] => utility
[patent_app_number] => 12/508895
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Array
(
[id] => 6153470
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[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-27
[patent_title] => 'FLASH STORAGE WITH ARRAY OF ATTACHED DEVICES'
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Array
(
[id] => 8985089
[patent_doc_number] => 08516219
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[patent_title] => 'Index cache tree'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/509267 | Index cache tree | Jul 23, 2009 | Issued |
Array
(
[id] => 6153472
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Array
(
[id] => 6153464
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Array
(
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/508531 | System and method for performing a direct memory access at a predetermined address in a flash storage | Jul 22, 2009 | Issued |
Array
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Array
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