Search

Sherrod L. Keaton

Examiner (ID: 8765, Phone: (571)270-1697 , Office: P/2142 )

Most Active Art Unit
2142
Art Unit(s)
2178, 2148, 2174, 2142, 2175, 2173
Total Applications
605
Issued Applications
290
Pending Applications
64
Abandoned Applications
274

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8552206 [patent_doc_number] => 08327104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-04 [patent_title] => 'Adjusting the timing of signals associated with a memory system' [patent_app_type] => utility [patent_app_number] => 11/939440 [patent_app_country] => US [patent_app_date] => 2007-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4724 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11939440 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/939440
Adjusting the timing of signals associated with a memory system Nov 12, 2007 Issued
Array ( [id] => 4614121 [patent_doc_number] => 07996636 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-08-09 [patent_title] => 'Uniquely identifying block context signatures in a storage volume hierarchy' [patent_app_type] => utility [patent_app_number] => 11/935704 [patent_app_country] => US [patent_app_date] => 2007-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 17539 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/996/07996636.pdf [firstpage_image] =>[orig_patent_app_number] => 11935704 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935704
Uniquely identifying block context signatures in a storage volume hierarchy Nov 5, 2007 Issued
Array ( [id] => 4530375 [patent_doc_number] => 07913055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Seamless application access to hybrid main memory' [patent_app_type] => utility [patent_app_number] => 11/935254 [patent_app_country] => US [patent_app_date] => 2007-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13681 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 451 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/913/07913055.pdf [firstpage_image] =>[orig_patent_app_number] => 11935254 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935254
Seamless application access to hybrid main memory Nov 4, 2007 Issued
Array ( [id] => 8683 [patent_doc_number] => 07818489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-19 [patent_title] => 'Integrating data from symmetric and asymmetric memory' [patent_app_type] => utility [patent_app_number] => 11/935275 [patent_app_country] => US [patent_app_date] => 2007-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 14092 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/818/07818489.pdf [firstpage_image] =>[orig_patent_app_number] => 11935275 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935275
Integrating data from symmetric and asymmetric memory Nov 4, 2007 Issued
Array ( [id] => 4499215 [patent_doc_number] => 07904642 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-03-08 [patent_title] => 'Method for combining and storing access control lists' [patent_app_type] => utility [patent_app_number] => 11/935286 [patent_app_country] => US [patent_app_date] => 2007-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 30 [patent_no_of_words] => 16203 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/904/07904642.pdf [firstpage_image] =>[orig_patent_app_number] => 11935286 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935286
Method for combining and storing access control lists Nov 4, 2007 Issued
Array ( [id] => 4966809 [patent_doc_number] => 20080109629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'ASYMMETRIC MEMORY MIGRATION IN HYBRID MAIN MEMORY' [patent_app_type] => utility [patent_app_number] => 11/935224 [patent_app_country] => US [patent_app_date] => 2007-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13961 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20080109629.pdf [firstpage_image] =>[orig_patent_app_number] => 11935224 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935224
Asymmetric memory migration in hybrid main memory Nov 4, 2007 Issued
Array ( [id] => 4447440 [patent_doc_number] => 07930513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-19 [patent_title] => 'Writing to asymmetric memory' [patent_app_type] => utility [patent_app_number] => 11/935281 [patent_app_country] => US [patent_app_date] => 2007-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 14547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 498 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/930/07930513.pdf [firstpage_image] =>[orig_patent_app_number] => 11935281 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935281
Writing to asymmetric memory Nov 4, 2007 Issued
Array ( [id] => 261824 [patent_doc_number] => 07574558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-11 [patent_title] => 'Sector-edge cache' [patent_app_type] => utility [patent_app_number] => 11/855400 [patent_app_country] => US [patent_app_date] => 2007-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5500 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/574/07574558.pdf [firstpage_image] =>[orig_patent_app_number] => 11855400 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/855400
Sector-edge cache Sep 13, 2007 Issued
Array ( [id] => 4917597 [patent_doc_number] => 20080098198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'INFORMATION PROCESSING DEVICE, DATA TRANSFER METHOD, AND INFORMATION STORAGE MEDIUM' [patent_app_type] => utility [patent_app_number] => 11/834074 [patent_app_country] => US [patent_app_date] => 2007-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2376 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20080098198.pdf [firstpage_image] =>[orig_patent_app_number] => 11834074 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834074
Information processing device, data transfer method, and information storage medium Aug 5, 2007 Issued
Array ( [id] => 8033565 [patent_doc_number] => 08145876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-27 [patent_title] => 'Address translation with multiple translation look aside buffers' [patent_app_type] => utility [patent_app_number] => 11/834478 [patent_app_country] => US [patent_app_date] => 2007-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6886 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/145/08145876.pdf [firstpage_image] =>[orig_patent_app_number] => 11834478 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834478
Address translation with multiple translation look aside buffers Aug 5, 2007 Issued
Array ( [id] => 4530333 [patent_doc_number] => 07913046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Method for performing a snapshot in a distributed shared file system' [patent_app_type] => utility [patent_app_number] => 11/834337 [patent_app_country] => US [patent_app_date] => 2007-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3663 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/913/07913046.pdf [firstpage_image] =>[orig_patent_app_number] => 11834337 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834337
Method for performing a snapshot in a distributed shared file system Aug 5, 2007 Issued
Array ( [id] => 5418091 [patent_doc_number] => 20090043978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'EFFICIENT HIERARCHICAL STORAGE MANAGEMENT OF A FILE SYSTEM WITH SNAPSHOTS' [patent_app_type] => utility [patent_app_number] => 11/834338 [patent_app_country] => US [patent_app_date] => 2007-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10891 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20090043978.pdf [firstpage_image] =>[orig_patent_app_number] => 11834338 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834338
Efficient hierarchical storage management of a file system with snapshots Aug 5, 2007 Issued
Array ( [id] => 7520994 [patent_doc_number] => 07975102 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-07-05 [patent_title] => 'Technique to avoid cascaded hot spotting' [patent_app_type] => utility [patent_app_number] => 11/834412 [patent_app_country] => US [patent_app_date] => 2007-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 9631 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/975/07975102.pdf [firstpage_image] =>[orig_patent_app_number] => 11834412 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834412
Technique to avoid cascaded hot spotting Aug 5, 2007 Issued
Array ( [id] => 4754715 [patent_doc_number] => 20080162791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'SOLID STATE STORAGE ELEMENT AND METHOD' [patent_app_type] => utility [patent_app_number] => 11/834565 [patent_app_country] => US [patent_app_date] => 2007-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 16847 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20080162791.pdf [firstpage_image] =>[orig_patent_app_number] => 11834565 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834565
Memory configuration and method for calibrating read/write data based on performance characteristics of the memory configuration Aug 5, 2007 Issued
Array ( [id] => 4558480 [patent_doc_number] => 07877553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Sharing volume data via shadow copies using differential areas' [patent_app_type] => utility [patent_app_number] => 11/834028 [patent_app_country] => US [patent_app_date] => 2007-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6458 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/877/07877553.pdf [firstpage_image] =>[orig_patent_app_number] => 11834028 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834028
Sharing volume data via shadow copies using differential areas Aug 5, 2007 Issued
Array ( [id] => 7495073 [patent_doc_number] => 08032710 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-10-04 [patent_title] => 'System and method for ensuring coherency in trace execution' [patent_app_type] => utility [patent_app_number] => 11/782163 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 30 [patent_no_of_words] => 21973 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/032/08032710.pdf [firstpage_image] =>[orig_patent_app_number] => 11782163 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/782163
System and method for ensuring coherency in trace execution Jul 23, 2007 Issued
Array ( [id] => 192921 [patent_doc_number] => 07644247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-05 [patent_title] => 'System controller for flash memory' [patent_app_type] => utility [patent_app_number] => 11/878410 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 10100 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/644/07644247.pdf [firstpage_image] =>[orig_patent_app_number] => 11878410 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/878410
System controller for flash memory Jul 23, 2007 Issued
Array ( [id] => 4747287 [patent_doc_number] => 20080091889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'MEMORY CONTROL APPARATUS' [patent_app_type] => utility [patent_app_number] => 11/781999 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3593 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20080091889.pdf [firstpage_image] =>[orig_patent_app_number] => 11781999 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/781999
MEMORY CONTROL APPARATUS Jul 23, 2007 Abandoned
Array ( [id] => 4636896 [patent_doc_number] => 08015359 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-09-06 [patent_title] => 'Method and system for utilizing a common structure for trace verification and maintaining coherency in an instruction processing circuit' [patent_app_type] => utility [patent_app_number] => 11/782238 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 30 [patent_no_of_words] => 21850 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/015/08015359.pdf [firstpage_image] =>[orig_patent_app_number] => 11782238 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/782238
Method and system for utilizing a common structure for trace verification and maintaining coherency in an instruction processing circuit Jul 23, 2007 Issued
Array ( [id] => 7972059 [patent_doc_number] => 07941607 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-05-10 [patent_title] => 'Method and system for promoting traces in an instruction processing circuit' [patent_app_type] => utility [patent_app_number] => 11/782140 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 30 [patent_no_of_words] => 21832 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/941/07941607.pdf [firstpage_image] =>[orig_patent_app_number] => 11782140 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/782140
Method and system for promoting traces in an instruction processing circuit Jul 23, 2007 Issued
Menu