
Sherrod L. Keaton
Examiner (ID: 8765, Phone: (571)270-1697 , Office: P/2142 )
| Most Active Art Unit | 2142 |
| Art Unit(s) | 2178, 2148, 2174, 2142, 2175, 2173 |
| Total Applications | 605 |
| Issued Applications | 290 |
| Pending Applications | 64 |
| Abandoned Applications | 274 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8552206
[patent_doc_number] => 08327104
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[patent_kind] => B2
[patent_issue_date] => 2012-12-04
[patent_title] => 'Adjusting the timing of signals associated with a memory system'
[patent_app_type] => utility
[patent_app_number] => 11/939440
[patent_app_country] => US
[patent_app_date] => 2007-11-13
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11939440
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/939440 | Adjusting the timing of signals associated with a memory system | Nov 12, 2007 | Issued |
Array
(
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[patent_doc_number] => 07996636
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[patent_kind] => B1
[patent_issue_date] => 2011-08-09
[patent_title] => 'Uniquely identifying block context signatures in a storage volume hierarchy'
[patent_app_type] => utility
[patent_app_number] => 11/935704
[patent_app_country] => US
[patent_app_date] => 2007-11-06
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/935704 | Uniquely identifying block context signatures in a storage volume hierarchy | Nov 5, 2007 | Issued |
Array
(
[id] => 4530375
[patent_doc_number] => 07913055
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[patent_kind] => B2
[patent_issue_date] => 2011-03-22
[patent_title] => 'Seamless application access to hybrid main memory'
[patent_app_type] => utility
[patent_app_number] => 11/935254
[patent_app_country] => US
[patent_app_date] => 2007-11-05
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[patent_drawing_sheets_cnt] => 17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/935254 | Seamless application access to hybrid main memory | Nov 4, 2007 | Issued |
Array
(
[id] => 8683
[patent_doc_number] => 07818489
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-19
[patent_title] => 'Integrating data from symmetric and asymmetric memory'
[patent_app_type] => utility
[patent_app_number] => 11/935275
[patent_app_country] => US
[patent_app_date] => 2007-11-05
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/935275 | Integrating data from symmetric and asymmetric memory | Nov 4, 2007 | Issued |
Array
(
[id] => 4499215
[patent_doc_number] => 07904642
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-03-08
[patent_title] => 'Method for combining and storing access control lists'
[patent_app_type] => utility
[patent_app_number] => 11/935286
[patent_app_country] => US
[patent_app_date] => 2007-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/935286 | Method for combining and storing access control lists | Nov 4, 2007 | Issued |
Array
(
[id] => 4966809
[patent_doc_number] => 20080109629
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-08
[patent_title] => 'ASYMMETRIC MEMORY MIGRATION IN HYBRID MAIN MEMORY'
[patent_app_type] => utility
[patent_app_number] => 11/935224
[patent_app_country] => US
[patent_app_date] => 2007-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[firstpage_image] =>[orig_patent_app_number] => 11935224
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/935224 | Asymmetric memory migration in hybrid main memory | Nov 4, 2007 | Issued |
Array
(
[id] => 4447440
[patent_doc_number] => 07930513
[patent_country] => US
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[patent_issue_date] => 2011-04-19
[patent_title] => 'Writing to asymmetric memory'
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[patent_app_number] => 11/935281
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/935281 | Writing to asymmetric memory | Nov 4, 2007 | Issued |
Array
(
[id] => 261824
[patent_doc_number] => 07574558
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-11
[patent_title] => 'Sector-edge cache'
[patent_app_type] => utility
[patent_app_number] => 11/855400
[patent_app_country] => US
[patent_app_date] => 2007-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/07/574/07574558.pdf
[firstpage_image] =>[orig_patent_app_number] => 11855400
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/855400 | Sector-edge cache | Sep 13, 2007 | Issued |
Array
(
[id] => 4917597
[patent_doc_number] => 20080098198
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[patent_issue_date] => 2008-04-24
[patent_title] => 'INFORMATION PROCESSING DEVICE, DATA TRANSFER METHOD, AND INFORMATION STORAGE MEDIUM'
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[firstpage_image] =>[orig_patent_app_number] => 11834074
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/834074 | Information processing device, data transfer method, and information storage medium | Aug 5, 2007 | Issued |
Array
(
[id] => 8033565
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[patent_issue_date] => 2012-03-27
[patent_title] => 'Address translation with multiple translation look aside buffers'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/834478 | Address translation with multiple translation look aside buffers | Aug 5, 2007 | Issued |
Array
(
[id] => 4530333
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[patent_title] => 'Method for performing a snapshot in a distributed shared file system'
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Array
(
[id] => 5418091
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Array
(
[id] => 7520994
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[patent_title] => 'Technique to avoid cascaded hot spotting'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/834412 | Technique to avoid cascaded hot spotting | Aug 5, 2007 | Issued |
Array
(
[id] => 4754715
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[patent_title] => 'SOLID STATE STORAGE ELEMENT AND METHOD'
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Array
(
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Array
(
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Array
(
[id] => 192921
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/781999 | MEMORY CONTROL APPARATUS | Jul 23, 2007 | Abandoned |
Array
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Array
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