Search

Shi K. Li

Examiner (ID: 15878)

Most Active Art Unit
2637
Art Unit(s)
2635, 2613, 2634, 2633, 2637
Total Applications
1411
Issued Applications
998
Pending Applications
96
Abandoned Applications
347

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15504117 [patent_doc_number] => 20200052247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => ORGANIC ELECTROLUMINESCENCE DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/658692 [patent_app_country] => US [patent_app_date] => 2019-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22215 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16658692 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/658692
Organic electroluminescence display device having a circular polarization plate and a high refractive index layer Oct 20, 2019 Issued
Array ( [id] => 17424346 [patent_doc_number] => 11257808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => High holding high voltage (HHHV) FET for ESD protection with modified source and method for producing the same [patent_app_type] => utility [patent_app_number] => 16/544455 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544455 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/544455
High holding high voltage (HHHV) FET for ESD protection with modified source and method for producing the same Aug 18, 2019 Issued
Array ( [id] => 17137638 [patent_doc_number] => 11139204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Semiconductor device comprised of contact plugs having pillar portions and protrusion portions extending from the pillar portions [patent_app_type] => utility [patent_app_number] => 16/441984 [patent_app_country] => US [patent_app_date] => 2019-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 56 [patent_no_of_words] => 12056 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16441984 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/441984
Semiconductor device comprised of contact plugs having pillar portions and protrusion portions extending from the pillar portions Jun 13, 2019 Issued
Array ( [id] => 14875673 [patent_doc_number] => 20190288078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/430444 [patent_app_country] => US [patent_app_date] => 2019-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16430444 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/430444
Manufacturing method for controlling carrier lifetimes in semiconductor substrates that includes injection and annealing Jun 3, 2019 Issued
Array ( [id] => 14875889 [patent_doc_number] => 20190288186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => THIN REFERENCE LAYER FOR STT MRAM [patent_app_type] => utility [patent_app_number] => 16/409905 [patent_app_country] => US [patent_app_date] => 2019-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4657 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16409905 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/409905
Thin reference layer for STT MRAM May 12, 2019 Issued
Array ( [id] => 16379410 [patent_doc_number] => 20200328253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => METAL-INSULATOR-SEMICONDUCTOR (MIS) RESISTIVE RANDOM ACCESS MEMORY (RRAM) (MIS RRAM) DEVICES AND MIS RRAM BIT CELL CIRCUITS, AND RELATED METHODS OF FABRICATING [patent_app_type] => utility [patent_app_number] => 16/382904 [patent_app_country] => US [patent_app_date] => 2019-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11468 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16382904 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/382904
METAL-INSULATOR-SEMICONDUCTOR (MIS) RESISTIVE RANDOM ACCESS MEMORY (RRAM) (MIS RRAM) DEVICES AND MIS RRAM BIT CELL CIRCUITS, AND RELATED METHODS OF FABRICATING Apr 11, 2019 Abandoned
Array ( [id] => 16645603 [patent_doc_number] => 10923471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Minimizing shorting between FinFET epitaxial regions [patent_app_type] => utility [patent_app_number] => 16/296433 [patent_app_country] => US [patent_app_date] => 2019-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 3779 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16296433 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/296433
Minimizing shorting between FinFET epitaxial regions Mar 7, 2019 Issued
Array ( [id] => 14785165 [patent_doc_number] => 20190267480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => ANTI-BARRIER-CONDUCTION (ABC) SPACERS FOR HIGH ELECTRON-MOBILITY TRANSISTORS (HEMTS) [patent_app_type] => utility [patent_app_number] => 16/239909 [patent_app_country] => US [patent_app_date] => 2019-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16239909 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/239909
ANTI-BARRIER-CONDUCTION (ABC) SPACERS FOR HIGH ELECTRON-MOBILITY TRANSISTORS (HEMTS) Jan 3, 2019 Abandoned
Array ( [id] => 16566921 [patent_doc_number] => 10892298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Light emitting diode display device with separation film and partition aligning to each other [patent_app_type] => utility [patent_app_number] => 16/205454 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8187 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16205454 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/205454
Light emitting diode display device with separation film and partition aligning to each other Nov 29, 2018 Issued
Array ( [id] => 14164229 [patent_doc_number] => 20190109217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => FETs and Methods of Forming FETs [patent_app_type] => utility [patent_app_number] => 16/206464 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7265 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16206464 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/206464
FinFET having a non-faceted top surface portion for a source/drain region Nov 29, 2018 Issued
Array ( [id] => 16001051 [patent_doc_number] => 20200176396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => PACKAGE SUBSTRATE WITH CTE MATCHING BARRIER RING AROUND MICROVIAS [patent_app_type] => utility [patent_app_number] => 16/205436 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4304 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -31 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16205436 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/205436
Package substrate with CTE matching barrier ring around microvias Nov 29, 2018 Issued
Array ( [id] => 17270361 [patent_doc_number] => 11195789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Integrated circuit module with a structurally balanced package using a bottom side interposer [patent_app_type] => utility [patent_app_number] => 16/205672 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 4149 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16205672 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/205672
Integrated circuit module with a structurally balanced package using a bottom side interposer Nov 29, 2018 Issued
Array ( [id] => 14046443 [patent_doc_number] => 20190079328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => DISPLAY PANEL, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/186577 [patent_app_country] => US [patent_app_date] => 2018-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7904 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186577 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186577
Display panel, display device, and method for manufacturing display panel having an orthographic projection of the support sections onto the base substrate Nov 10, 2018 Issued
Array ( [id] => 16593938 [patent_doc_number] => 10903215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Layout structure of semiconductor structure for dynamic random access memory device and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/102748 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8024 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16102748 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/102748
Layout structure of semiconductor structure for dynamic random access memory device and method for forming the same Aug 13, 2018 Issued
Array ( [id] => 15580761 [patent_doc_number] => 10580774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Layout construction for addressing electromigration [patent_app_type] => utility [patent_app_number] => 16/057036 [patent_app_country] => US [patent_app_date] => 2018-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 12629 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16057036 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/057036
Layout construction for addressing electromigration Aug 6, 2018 Issued
Array ( [id] => 14676679 [patent_doc_number] => 20190237454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING SAME [patent_app_type] => utility [patent_app_number] => 16/051848 [patent_app_country] => US [patent_app_date] => 2018-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10031 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16051848 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/051848
Method of forming a dummy die of an integrated circuit having an embedded annular structure Jul 31, 2018 Issued
Array ( [id] => 17048019 [patent_doc_number] => 11101209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Redistribution structures in semiconductor packages and methods of forming same [patent_app_type] => utility [patent_app_number] => 16/051817 [patent_app_country] => US [patent_app_date] => 2018-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 38 [patent_no_of_words] => 14491 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16051817 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/051817
Redistribution structures in semiconductor packages and methods of forming same Jul 31, 2018 Issued
Array ( [id] => 14317291 [patent_doc_number] => 20190148349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/051926 [patent_app_country] => US [patent_app_date] => 2018-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7473 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16051926 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/051926
Semiconductor package including processor chip and memory chip Jul 31, 2018 Issued
Array ( [id] => 13571407 [patent_doc_number] => 20180337251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => FINFET and Method of Forming the Same [patent_app_type] => utility [patent_app_number] => 16/049879 [patent_app_country] => US [patent_app_date] => 2018-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16049879 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/049879
FinFET device comprising plurality of dummy protruding features Jul 30, 2018 Issued
Array ( [id] => 14617005 [patent_doc_number] => 10361209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-23 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/043166 [patent_app_country] => US [patent_app_date] => 2018-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5754 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 393 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16043166 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/043166
Semiconductor memory device Jul 23, 2018 Issued
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