Search

Shi K. Li

Examiner (ID: 15878)

Most Active Art Unit
2637
Art Unit(s)
2635, 2613, 2634, 2633, 2637
Total Applications
1411
Issued Applications
998
Pending Applications
96
Abandoned Applications
347

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10244299 [patent_doc_number] => 20150129295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-14 [patent_title] => 'DOUBLE-SHOT INJECTION MOLDING FORMED LED LEAD FRAME STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/076780 [patent_app_country] => US [patent_app_date] => 2013-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1939 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14076780 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/076780
DOUBLE-SHOT INJECTION MOLDING FORMED LED LEAD FRAME STRUCTURE Nov 10, 2013 Abandoned
Array ( [id] => 10918110 [patent_doc_number] => 20140321129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'LIGHT EMITTING DIODE MODULE' [patent_app_type] => utility [patent_app_number] => 14/056966 [patent_app_country] => US [patent_app_date] => 2013-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1178 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14056966 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/056966
LIGHT EMITTING DIODE MODULE Oct 17, 2013 Abandoned
Array ( [id] => 9291334 [patent_doc_number] => 20140034968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'BIPOLAR JUNCTION TRANSISTOR WITH SPACER LAYER' [patent_app_type] => utility [patent_app_number] => 14/048940 [patent_app_country] => US [patent_app_date] => 2013-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10342 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14048940 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/048940
Bipolar junction transistor with spacer layer Oct 7, 2013 Issued
Array ( [id] => 9294690 [patent_doc_number] => 20140038324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'MANUFACTURING METHOD OF LIGHT EMITTING APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/045472 [patent_app_country] => US [patent_app_date] => 2013-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8474 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14045472 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/045472
MANUFACTURING METHOD OF LIGHT EMITTING APPARATUS Oct 2, 2013 Abandoned
Array ( [id] => 9277743 [patent_doc_number] => 20140027711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-30 [patent_title] => 'QUANTUM DOTS, METHOD, AND DEVICES' [patent_app_type] => utility [patent_app_number] => 14/041618 [patent_app_country] => US [patent_app_date] => 2013-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8966 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14041618 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/041618
Quantum dots, method, and devices Sep 29, 2013 Issued
Array ( [id] => 9277745 [patent_doc_number] => 20140027713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-30 [patent_title] => 'DEVICE INCLUDING QUANTUM DOTS' [patent_app_type] => utility [patent_app_number] => 14/042074 [patent_app_country] => US [patent_app_date] => 2013-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 8784 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14042074 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/042074
DEVICE INCLUDING QUANTUM DOTS Sep 29, 2013 Abandoned
Array ( [id] => 9277744 [patent_doc_number] => 20140027712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-30 [patent_title] => 'DEVICES INCLUDING QUANTUM DOTS AND METHOD' [patent_app_type] => utility [patent_app_number] => 14/041881 [patent_app_country] => US [patent_app_date] => 2013-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8718 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14041881 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/041881
DEVICES INCLUDING QUANTUM DOTS AND METHOD Sep 29, 2013 Abandoned
Array ( [id] => 9876070 [patent_doc_number] => 08963343 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-24 [patent_title] => 'Ferroelectric memories with a stress buffer' [patent_app_type] => utility [patent_app_number] => 14/040616 [patent_app_country] => US [patent_app_date] => 2013-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3020 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14040616 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/040616
Ferroelectric memories with a stress buffer Sep 26, 2013 Issued
Array ( [id] => 9728896 [patent_doc_number] => 20140264603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'PARTIALLY ISOLATED FIN-SHAPED FIELD EFFECT TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 14/036759 [patent_app_country] => US [patent_app_date] => 2013-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2758 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14036759 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/036759
Partially isolated Fin-shaped field effect transistors Sep 24, 2013 Issued
Array ( [id] => 9728895 [patent_doc_number] => 20140264602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'FORMING STRAINED AND RELAXED SILICON AND SILICON GERMANIUM FINS ON THE SAME WAFER' [patent_app_type] => utility [patent_app_number] => 14/031118 [patent_app_country] => US [patent_app_date] => 2013-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5735 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14031118 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/031118
Forming strained and relaxed silicon and silicon germanium fins on the same wafer Sep 18, 2013 Issued
Array ( [id] => 9728893 [patent_doc_number] => 20140264600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'FORMATION OF BULK SiGe FIN WITH DIELECTRIC ISOLATION BY ANODIZATION' [patent_app_type] => utility [patent_app_number] => 14/029198 [patent_app_country] => US [patent_app_date] => 2013-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8260 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14029198 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/029198
Formation of bulk SiGe fin with dielectric isolation by anodization Sep 16, 2013 Issued
Array ( [id] => 11637952 [patent_doc_number] => 09659936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Layout construction for addressing electromigration' [patent_app_type] => utility [patent_app_number] => 13/975074 [patent_app_country] => US [patent_app_date] => 2013-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 12908 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13975074 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/975074
Layout construction for addressing electromigration Aug 22, 2013 Issued
Array ( [id] => 11637952 [patent_doc_number] => 09659936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Layout construction for addressing electromigration' [patent_app_type] => utility [patent_app_number] => 13/975074 [patent_app_country] => US [patent_app_date] => 2013-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 12908 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13975074 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/975074
Layout construction for addressing electromigration Aug 22, 2013 Issued
Array ( [id] => 11637952 [patent_doc_number] => 09659936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Layout construction for addressing electromigration' [patent_app_type] => utility [patent_app_number] => 13/975074 [patent_app_country] => US [patent_app_date] => 2013-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 12908 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13975074 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/975074
Layout construction for addressing electromigration Aug 22, 2013 Issued
Array ( [id] => 11637952 [patent_doc_number] => 09659936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Layout construction for addressing electromigration' [patent_app_type] => utility [patent_app_number] => 13/975074 [patent_app_country] => US [patent_app_date] => 2013-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 12908 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13975074 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/975074
Layout construction for addressing electromigration Aug 22, 2013 Issued
Array ( [id] => 9893299 [patent_doc_number] => 20150048497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-19 [patent_title] => 'INTERPOSER WITH ELECTROSTATIC DISCHARGE PROTECTION' [patent_app_type] => utility [patent_app_number] => 13/968708 [patent_app_country] => US [patent_app_date] => 2013-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13968708 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/968708
INTERPOSER WITH ELECTROSTATIC DISCHARGE PROTECTION Aug 15, 2013 Abandoned
Array ( [id] => 11578599 [patent_doc_number] => 09633869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-25 [patent_title] => 'Packages with interposers and methods for forming the same' [patent_app_type] => utility [patent_app_number] => 13/968730 [patent_app_country] => US [patent_app_date] => 2013-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2670 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13968730 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/968730
Packages with interposers and methods for forming the same Aug 15, 2013 Issued
Array ( [id] => 9828071 [patent_doc_number] => 08937299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-20 [patent_title] => 'III-V finFETs on silicon substrate' [patent_app_type] => utility [patent_app_number] => 13/967102 [patent_app_country] => US [patent_app_date] => 2013-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 5435 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13967102 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/967102
III-V finFETs on silicon substrate Aug 13, 2013 Issued
Array ( [id] => 9594559 [patent_doc_number] => 20140191237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'CRYSTALLINE THIN-FILM TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/967128 [patent_app_country] => US [patent_app_date] => 2013-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5663 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13967128 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/967128
CRYSTALLINE THIN-FILM TRANSISTOR Aug 13, 2013 Abandoned
Array ( [id] => 10525556 [patent_doc_number] => 09252076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => '3D packages and methods for forming the same' [patent_app_type] => utility [patent_app_number] => 13/961589 [patent_app_country] => US [patent_app_date] => 2013-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 5994 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13961589 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/961589
3D packages and methods for forming the same Aug 6, 2013 Issued
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