Search

Shi K. Li

Examiner (ID: 15878)

Most Active Art Unit
2637
Art Unit(s)
2635, 2613, 2634, 2633, 2637
Total Applications
1411
Issued Applications
998
Pending Applications
96
Abandoned Applications
347

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11983886 [patent_doc_number] => 20170288041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'METHOD FOR FORMING A DOPED REGION IN A FIN USING A VARIABLE THICKNESS SPACER AND THE RESULTING DEVICE' [patent_app_type] => utility [patent_app_number] => 15/091256 [patent_app_country] => US [patent_app_date] => 2016-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2535 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15091256 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/091256
METHOD FOR FORMING A DOPED REGION IN A FIN USING A VARIABLE THICKNESS SPACER AND THE RESULTING DEVICE Apr 4, 2016 Abandoned
Array ( [id] => 14484753 [patent_doc_number] => 10329142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Wafer level package and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/091057 [patent_app_country] => US [patent_app_date] => 2016-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5193 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15091057 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/091057
Wafer level package and method of manufacturing the same Apr 4, 2016 Issued
Array ( [id] => 12588750 [patent_doc_number] => 20180088079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => NANOSCALE WIRES WITH EXTERNAL LAYERS FOR SENSORS AND OTHER APPLICATIONS [patent_app_type] => utility [patent_app_number] => 15/563773 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18395 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -50 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15563773 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/563773
NANOSCALE WIRES WITH EXTERNAL LAYERS FOR SENSORS AND OTHER APPLICATIONS Mar 31, 2016 Abandoned
Array ( [id] => 11818086 [patent_doc_number] => 09722048 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-01 [patent_title] => 'Vertical transistors with reduced bottom electrode series resistance' [patent_app_type] => utility [patent_app_number] => 15/082142 [patent_app_country] => US [patent_app_date] => 2016-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 48 [patent_no_of_words] => 6433 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15082142 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/082142
Vertical transistors with reduced bottom electrode series resistance Mar 27, 2016 Issued
Array ( [id] => 12396201 [patent_doc_number] => 09966322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-08 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/071195 [patent_app_country] => US [patent_app_date] => 2016-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 38 [patent_no_of_words] => 8797 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15071195 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/071195
Semiconductor device Mar 14, 2016 Issued
Array ( [id] => 14859411 [patent_doc_number] => 10418441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Semiconductor device and method for manufacturing the semiconductor device [patent_app_type] => utility [patent_app_number] => 15/071185 [patent_app_country] => US [patent_app_date] => 2016-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 22646 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 423 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15071185 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/071185
Semiconductor device and method for manufacturing the semiconductor device Mar 14, 2016 Issued
Array ( [id] => 11000319 [patent_doc_number] => 20160197266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-07 [patent_title] => 'MAGNETORESISTIVE ELEMENT AND MAGNETIC MEMORY' [patent_app_type] => utility [patent_app_number] => 15/067744 [patent_app_country] => US [patent_app_date] => 2016-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7019 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15067744 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/067744
Magnetoresistive element and magnetic memory Mar 10, 2016 Issued
Array ( [id] => 11000321 [patent_doc_number] => 20160197268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-07 [patent_title] => 'MAGNETORESISTIVE EFFECT ELEMENT, MANUFACTURING METHOD OF MAGNETORESISTIVE EFFECT ELEMENT, AND MAGNETIC MEMORY' [patent_app_type] => utility [patent_app_number] => 15/068062 [patent_app_country] => US [patent_app_date] => 2016-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 20285 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15068062 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/068062
MAGNETORESISTIVE EFFECT ELEMENT, MANUFACTURING METHOD OF MAGNETORESISTIVE EFFECT ELEMENT, AND MAGNETIC MEMORY Mar 10, 2016 Abandoned
Array ( [id] => 10984374 [patent_doc_number] => 20160181319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'RESISTANCE CHANGE MEMORY' [patent_app_type] => utility [patent_app_number] => 15/054706 [patent_app_country] => US [patent_app_date] => 2016-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4355 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15054706 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/054706
Resistance change memory Feb 25, 2016 Issued
Array ( [id] => 14460259 [patent_doc_number] => 10326105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Packaging assembly and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/309511 [patent_app_country] => US [patent_app_date] => 2016-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4328 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15309511 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/309511
Packaging assembly and manufacturing method thereof Feb 22, 2016 Issued
Array ( [id] => 11050835 [patent_doc_number] => 20160247794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'Compound Semiconductor Transistor with Gate Overvoltage Protection' [patent_app_type] => utility [patent_app_number] => 15/050823 [patent_app_country] => US [patent_app_date] => 2016-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6336 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15050823 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/050823
Compound semiconductor transistor with gate overvoltage protection Feb 22, 2016 Issued
Array ( [id] => 11028993 [patent_doc_number] => 20160225949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'PSEUDOMORPHIC ELECTRONIC AND OPTOELECTRONIC DEVICES HAVING PLANAR CONTACTS' [patent_app_type] => utility [patent_app_number] => 15/046515 [patent_app_country] => US [patent_app_date] => 2016-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9408 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15046515 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/046515
Pseudomorphic electronic and optoelectronic devices having planar contacts Feb 17, 2016 Issued
Array ( [id] => 11072057 [patent_doc_number] => 20160269021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'Collector-Side-Base-Driven Two-Base-Contact Bipolar Transistor with Reduced Series Resistance' [patent_app_type] => utility [patent_app_number] => 15/018844 [patent_app_country] => US [patent_app_date] => 2016-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3238 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15018844 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/018844
Collector-Side-Base-Driven Two-Base-Contact Bipolar Transistor with Reduced Series Resistance Feb 7, 2016 Abandoned
Array ( [id] => 14205481 [patent_doc_number] => 10269866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Magnetoresistive element and magnetic memory [patent_app_type] => utility [patent_app_number] => 15/010669 [patent_app_country] => US [patent_app_date] => 2016-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 55 [patent_no_of_words] => 14448 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15010669 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/010669
Magnetoresistive element and magnetic memory Jan 28, 2016 Issued
Array ( [id] => 13682893 [patent_doc_number] => 20160380183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => TECHNIQUES FOR MRAM MTJ TOP ELECTRODE CONNECTION [patent_app_type] => utility [patent_app_number] => 15/000289 [patent_app_country] => US [patent_app_date] => 2016-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4966 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15000289 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/000289
Techniques for MRAM MTJ top electrode connection Jan 18, 2016 Issued
Array ( [id] => 13243373 [patent_doc_number] => 10134898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => High dose implantation for ultrathin semiconductor-on-insulator substrates [patent_app_type] => utility [patent_app_number] => 14/982052 [patent_app_country] => US [patent_app_date] => 2015-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4737 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14982052 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/982052
High dose implantation for ultrathin semiconductor-on-insulator substrates Dec 28, 2015 Issued
Array ( [id] => 10765253 [patent_doc_number] => 20160111409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-21 [patent_title] => '3D Packages and Methods for Forming the Same' [patent_app_type] => utility [patent_app_number] => 14/970250 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14970250 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/970250
3D packages and methods for forming the same Dec 14, 2015 Issued
Array ( [id] => 14617007 [patent_doc_number] => 10361210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-23 [patent_title] => Low-drive current FinFET structure for improving circuit density of ratioed logic in SRAM devices [patent_app_type] => utility [patent_app_number] => 14/953498 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3596 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14953498 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/953498
Low-drive current FinFET structure for improving circuit density of ratioed logic in SRAM devices Nov 29, 2015 Issued
Array ( [id] => 11645138 [patent_doc_number] => 09666529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Method and structure to reduce the electric field in semiconductor wiring interconnects' [patent_app_type] => utility [patent_app_number] => 14/883972 [patent_app_country] => US [patent_app_date] => 2015-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 4725 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883972 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/883972
Method and structure to reduce the electric field in semiconductor wiring interconnects Oct 14, 2015 Issued
Array ( [id] => 10689644 [patent_doc_number] => 20160035790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/884267 [patent_app_country] => US [patent_app_date] => 2015-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 70 [patent_figures_cnt] => 70 [patent_no_of_words] => 16252 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14884267 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/884267
Semiconductor device and method for producing semiconductor device Oct 14, 2015 Issued
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