
Shrinivas H. Rao
Examiner (ID: 12344)
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2814 |
| Total Applications | 887 |
| Issued Applications | 688 |
| Pending Applications | 26 |
| Abandoned Applications | 174 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 218137
[patent_doc_number] => 07613050
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-03
[patent_title] => 'Sense-amplifier assist (SAA) with power-reduction technique'
[patent_app_type] => utility
[patent_app_number] => 11/764237
[patent_app_country] => US
[patent_app_date] => 2007-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 5486
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 242
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/613/07613050.pdf
[firstpage_image] =>[orig_patent_app_number] => 11764237
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/764237 | Sense-amplifier assist (SAA) with power-reduction technique | Jun 17, 2007 | Issued |
Array
(
[id] => 5245147
[patent_doc_number] => 20070241381
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-18
[patent_title] => 'Methods for Fabricating Semiconductor Devices'
[patent_app_type] => utility
[patent_app_number] => 11/764679
[patent_app_country] => US
[patent_app_date] => 2007-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1490
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0241/20070241381.pdf
[firstpage_image] =>[orig_patent_app_number] => 11764679
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/764679 | Methods for fabricating semiconductor devices | Jun 17, 2007 | Issued |
Array
(
[id] => 5228130
[patent_doc_number] => 20070290237
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-20
[patent_title] => 'INSULATED GATE BIPOLAR TRANSISTOR AND METHOD FOR MANUFACTURING SAME'
[patent_app_type] => utility
[patent_app_number] => 11/763558
[patent_app_country] => US
[patent_app_date] => 2007-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 9265
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0290/20070290237.pdf
[firstpage_image] =>[orig_patent_app_number] => 11763558
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/763558 | Insulated gate bipolar transistor | Jun 14, 2007 | Issued |
Array
(
[id] => 163258
[patent_doc_number] => 07671464
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-02
[patent_title] => 'Lighting device having a lighting unit with an optical semiconductor bare chip mounted on printed wiring board'
[patent_app_type] => utility
[patent_app_number] => 11/764098
[patent_app_country] => US
[patent_app_date] => 2007-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 23
[patent_no_of_words] => 9514
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/671/07671464.pdf
[firstpage_image] =>[orig_patent_app_number] => 11764098
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/764098 | Lighting device having a lighting unit with an optical semiconductor bare chip mounted on printed wiring board | Jun 14, 2007 | Issued |
Array
(
[id] => 4506580
[patent_doc_number] => 07915062
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-29
[patent_title] => 'Method of manufacturing a TFT array substrate'
[patent_app_type] => utility
[patent_app_number] => 11/762398
[patent_app_country] => US
[patent_app_date] => 2007-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 8725
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/915/07915062.pdf
[firstpage_image] =>[orig_patent_app_number] => 11762398
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/762398 | Method of manufacturing a TFT array substrate | Jun 12, 2007 | Issued |
Array
(
[id] => 4756666
[patent_doc_number] => 20080308891
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-18
[patent_title] => 'ULTRA LOW DARK CURRENT PIN PHOTODETECTOR'
[patent_app_type] => utility
[patent_app_number] => 11/762489
[patent_app_country] => US
[patent_app_date] => 2007-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4158
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0308/20080308891.pdf
[firstpage_image] =>[orig_patent_app_number] => 11762489
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/762489 | Ultra low dark current pin photodetector | Jun 12, 2007 | Issued |
Array
(
[id] => 133812
[patent_doc_number] => 07696558
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-04-13
[patent_title] => 'Semiconductor memory device for storing data as state of majority carriers accumulated in channel body and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/761889
[patent_app_country] => US
[patent_app_date] => 2007-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 58
[patent_no_of_words] => 9059
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/696/07696558.pdf
[firstpage_image] =>[orig_patent_app_number] => 11761889
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/761889 | Semiconductor memory device for storing data as state of majority carriers accumulated in channel body and method of manufacturing the same | Jun 11, 2007 | Issued |
Array
(
[id] => 4756642
[patent_doc_number] => 20080308867
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-18
[patent_title] => 'PARTIALLY DEPLETED SOI FIELD EFFECT TRANSISTOR HAVING A METALLIZED SOURCE SIDE HALO REGION'
[patent_app_type] => utility
[patent_app_number] => 11/761568
[patent_app_country] => US
[patent_app_date] => 2007-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6359
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0308/20080308867.pdf
[firstpage_image] =>[orig_patent_app_number] => 11761568
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/761568 | Partially depleted SOI field effect transistor having a metallized source side halo region | Jun 11, 2007 | Issued |
Array
(
[id] => 5088848
[patent_doc_number] => 20070228487
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-04
[patent_title] => 'STRUCTURE AND METHOD FOR LATCHUP SUPPRESSION'
[patent_app_type] => utility
[patent_app_number] => 11/760253
[patent_app_country] => US
[patent_app_date] => 2007-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4880
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0228/20070228487.pdf
[firstpage_image] =>[orig_patent_app_number] => 11760253
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/760253 | STRUCTURE AND METHOD FOR LATCHUP SUPPRESSION | Jun 7, 2007 | Abandoned |
Array
(
[id] => 5196716
[patent_doc_number] => 20070296034
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-27
[patent_title] => 'SILICON-ON-INSULATOR (SOI) MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/759949
[patent_app_country] => US
[patent_app_date] => 2007-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4788
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0296/20070296034.pdf
[firstpage_image] =>[orig_patent_app_number] => 11759949
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/759949 | SILICON-ON-INSULATOR (SOI) MEMORY DEVICE | Jun 7, 2007 | Abandoned |
Array
(
[id] => 4946979
[patent_doc_number] => 20080303105
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'DUAL GATE DIELECTRIC SRAM'
[patent_app_type] => utility
[patent_app_number] => 11/759538
[patent_app_country] => US
[patent_app_date] => 2007-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 7890
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0303/20080303105.pdf
[firstpage_image] =>[orig_patent_app_number] => 11759538
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/759538 | Dual gate dielectric SRAM | Jun 6, 2007 | Issued |
Array
(
[id] => 4667140
[patent_doc_number] => 20080042200
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-21
[patent_title] => 'THIN-FILM TRANSISTOR AND FABRICATION METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/759169
[patent_app_country] => US
[patent_app_date] => 2007-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3035
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0042/20080042200.pdf
[firstpage_image] =>[orig_patent_app_number] => 11759169
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/759169 | THIN-FILM TRANSISTOR AND FABRICATION METHOD THEREOF | Jun 5, 2007 | Abandoned |
Array
(
[id] => 4946930
[patent_doc_number] => 20080303056
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'SEMICONDUCTOR SUBASSEMBLIES WITH INTERCONNECTS AND METHODS FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/758859
[patent_app_country] => US
[patent_app_date] => 2007-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5090
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0303/20080303056.pdf
[firstpage_image] =>[orig_patent_app_number] => 11758859
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/758859 | Semiconductor subassemblies with interconnects and methods for manufacturing the same | Jun 5, 2007 | Issued |
Array
(
[id] => 5196642
[patent_doc_number] => 20070295960
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-27
[patent_title] => 'SEMICONDUCTOR DEVICE, ELECTRO-OPTICAL DEVICE, ELECTRONIC APPARATUS, AND METHOD OF PRODUCING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/758728
[patent_app_country] => US
[patent_app_date] => 2007-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4993
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0295/20070295960.pdf
[firstpage_image] =>[orig_patent_app_number] => 11758728
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/758728 | SEMICONDUCTOR DEVICE, ELECTRO-OPTICAL DEVICE, ELECTRONIC APPARATUS, AND METHOD OF PRODUCING SEMICONDUCTOR DEVICE | Jun 5, 2007 | Abandoned |
Array
(
[id] => 185736
[patent_doc_number] => 07649268
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-19
[patent_title] => 'Semiconductor wafer'
[patent_app_type] => utility
[patent_app_number] => 11/758639
[patent_app_country] => US
[patent_app_date] => 2007-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 4448
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/649/07649268.pdf
[firstpage_image] =>[orig_patent_app_number] => 11758639
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/758639 | Semiconductor wafer | Jun 4, 2007 | Issued |
Array
(
[id] => 5229426
[patent_doc_number] => 20070291533
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-20
[patent_title] => 'PHASE CHANGE MEMORY DEVICE AND FABRICATION METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/758559
[patent_app_country] => US
[patent_app_date] => 2007-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2038
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0291/20070291533.pdf
[firstpage_image] =>[orig_patent_app_number] => 11758559
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/758559 | PHASE CHANGE MEMORY DEVICE AND FABRICATION METHOD THEREOF | Jun 4, 2007 | Abandoned |
Array
(
[id] => 5123511
[patent_doc_number] => 20070235781
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-11
[patent_title] => 'Solid state image pickup device'
[patent_app_type] => utility
[patent_app_number] => 11/810440
[patent_app_country] => US
[patent_app_date] => 2007-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2751
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20070235781.pdf
[firstpage_image] =>[orig_patent_app_number] => 11810440
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/810440 | Solid state image pickup device | Jun 4, 2007 | Issued |
Array
(
[id] => 5060300
[patent_doc_number] => 20070221937
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-27
[patent_title] => 'SEMICONDUCTOR LIGHT EMITTING APPARATUS AND ITS MANUFACTURING METHOD'
[patent_app_type] => utility
[patent_app_number] => 11/756959
[patent_app_country] => US
[patent_app_date] => 2007-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 5356
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0221/20070221937.pdf
[firstpage_image] =>[orig_patent_app_number] => 11756959
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/756959 | Semiconductor light emitting apparatus and its manufacturing method | May 31, 2007 | Issued |
Array
(
[id] => 4856461
[patent_doc_number] => 20080265311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-30
[patent_title] => 'VERTICAL TRANSISTOR AND METHOD FOR PREPARING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/756529
[patent_app_country] => US
[patent_app_date] => 2007-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 2061
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0265/20080265311.pdf
[firstpage_image] =>[orig_patent_app_number] => 11756529
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/756529 | VERTICAL TRANSISTOR AND METHOD FOR PREPARING THE SAME | May 30, 2007 | Abandoned |
Array
(
[id] => 4708247
[patent_doc_number] => 20080296773
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-04
[patent_title] => 'POWER SEMICONDUCTOR DEVICE WITH IMPROVED HEAT DISSIPATION'
[patent_app_type] => utility
[patent_app_number] => 11/756389
[patent_app_country] => US
[patent_app_date] => 2007-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1590
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0296/20080296773.pdf
[firstpage_image] =>[orig_patent_app_number] => 11756389
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/756389 | Power semiconductor device with improved heat dissipation | May 30, 2007 | Issued |