Search

Sibin Chen

Examiner (ID: 9217, Phone: (571)270-5768 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2896, 4183, 2816, 2836, 2842
Total Applications
1265
Issued Applications
1067
Pending Applications
76
Abandoned Applications
144

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19893809 [patent_doc_number] => 20250119121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => IMPEDANCE CALIBRATION CIRCUIT AND METHOD [patent_app_type] => utility [patent_app_number] => 18/985370 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13053 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985370 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985370
IMPEDANCE CALIBRATION CIRCUIT AND METHOD Dec 17, 2024 Pending
Array ( [id] => 20298399 [patent_doc_number] => 20250323642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/973310 [patent_app_country] => US [patent_app_date] => 2024-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18973310 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/973310
SEMICONDUCTOR DEVICE Dec 8, 2024 Pending
Array ( [id] => 20467991 [patent_doc_number] => 12524029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Digital-analog integrated voltage transformer calibration system [patent_app_type] => utility [patent_app_number] => 18/890694 [patent_app_country] => US [patent_app_date] => 2024-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 1187 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 458 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18890694 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/890694
Digital-analog integrated voltage transformer calibration system Sep 18, 2024 Issued
Array ( [id] => 20603578 [patent_doc_number] => 20260081592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-19 [patent_title] => MULTI-STAGE ADAPTIVE GATE DRIVE CONTROL [patent_app_type] => utility [patent_app_number] => 18/887209 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1225 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18887209 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/887209
MULTI-STAGE ADAPTIVE GATE DRIVE CONTROL Sep 16, 2024 Pending
Array ( [id] => 20589106 [patent_doc_number] => 20260074703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => Phase-Locked Loop (PLL) Circuitry having Phase Interpolators with Reduced Power Consumption [patent_app_type] => utility [patent_app_number] => 18/882316 [patent_app_country] => US [patent_app_date] => 2024-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18882316 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/882316
Phase-locked loop (PLL) circuitry having phase interpolators with reduced power consumption Sep 10, 2024 Issued
Array ( [id] => 19662861 [patent_doc_number] => 20240429926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => MAINTAINING PHASE COHERENCE FOR A FRACTIONAL-N PLL [patent_app_type] => utility [patent_app_number] => 18/821040 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7525 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821040 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/821040
MAINTAINING PHASE COHERENCE FOR A FRACTIONAL-N PLL Aug 29, 2024 Pending
Array ( [id] => 20558859 [patent_doc_number] => 20260058646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-26 [patent_title] => SOLID-STATE BIDIRECTIONAL SWITCH WITH SOFT SWITCHING [patent_app_type] => utility [patent_app_number] => 18/813708 [patent_app_country] => US [patent_app_date] => 2024-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18813708 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/813708
SOLID-STATE BIDIRECTIONAL SWITCH WITH SOFT SWITCHING Aug 22, 2024 Pending
Array ( [id] => 20168269 [patent_doc_number] => 20250260316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => MULTI-PHASE SWITCHED-CAPACITOR OVERLAPPING GATE DRIVE [patent_app_type] => utility [patent_app_number] => 18/812025 [patent_app_country] => US [patent_app_date] => 2024-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18812025 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/812025
MULTI-PHASE SWITCHED-CAPACITOR OVERLAPPING GATE DRIVE Aug 21, 2024 Pending
Array ( [id] => 19836403 [patent_doc_number] => 20250088189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => PULL-DOWN CIRCUIT, PULL-UP CIRCUIT, AND VOLTAGE SUPPLY CIRCUIT INCLUDING PULL-DOWN CIRCUIT AND PULL-UP CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/809330 [patent_app_country] => US [patent_app_date] => 2024-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10875 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18809330 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/809330
PULL-DOWN CIRCUIT, PULL-UP CIRCUIT, AND VOLTAGE SUPPLY CIRCUIT INCLUDING PULL-DOWN CIRCUIT AND PULL-UP CIRCUIT Aug 19, 2024 Pending
Array ( [id] => 20791584 [patent_doc_number] => 12665505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-23 [patent_title] => Charge pump circuit [patent_app_type] => utility [patent_app_number] => 18/808180 [patent_app_country] => US [patent_app_date] => 2024-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18808180 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/808180
Charge pump circuit Aug 18, 2024 Issued
Array ( [id] => 20544986 [patent_doc_number] => 20260051879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-19 [patent_title] => HIGH PERFORMANCE DATA LATCHING USING AN ENERGY EFFICIENT CLOCKED LATCH TOPOLOGY [patent_app_type] => utility [patent_app_number] => 18/802974 [patent_app_country] => US [patent_app_date] => 2024-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18802974 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/802974
HIGH PERFORMANCE DATA LATCHING USING AN ENERGY EFFICIENT CLOCKED LATCH TOPOLOGY Aug 12, 2024 Pending
Array ( [id] => 20521829 [patent_doc_number] => 20260045938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-12 [patent_title] => MASTER LATCH AND FLIP-FLOP [patent_app_type] => utility [patent_app_number] => 18/801145 [patent_app_country] => US [patent_app_date] => 2024-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18801145 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/801145
MASTER LATCH AND FLIP-FLOP Aug 11, 2024 Pending
Array ( [id] => 20690816 [patent_doc_number] => 12620978 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-05 [patent_title] => Use of pulse width modulation to generate excitation pulses offset from sampling pulses [patent_app_type] => utility [patent_app_number] => 18/799184 [patent_app_country] => US [patent_app_date] => 2024-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18799184 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/799184
Use of pulse width modulation to generate excitation pulses offset from sampling pulses Aug 8, 2024 Issued
Array ( [id] => 20625169 [patent_doc_number] => 12592685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => Flip-flops and integrated circuits including the same [patent_app_type] => utility [patent_app_number] => 18/789521 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 27 [patent_no_of_words] => 6900 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789521 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789521
Flip-flops and integrated circuits including the same Jul 29, 2024 Issued
Array ( [id] => 20667897 [patent_doc_number] => 12609682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Computing device [patent_app_type] => utility [patent_app_number] => 18/760388 [patent_app_country] => US [patent_app_date] => 2024-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18760388 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/760388
Computing device Jun 30, 2024 Issued
Array ( [id] => 20124967 [patent_doc_number] => 20250239998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => REDUCED POWER CONSUMPTION COMPUTE-IN-MEMORY SYSTEM, METHOD OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 18/752125 [patent_app_country] => US [patent_app_date] => 2024-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4266 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18752125 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/752125
Reduced power consumption compute-in-memory system, method of operating same Jun 23, 2024 Issued
Array ( [id] => 19500970 [patent_doc_number] => 20240339988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => DRIVING CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/748087 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18748087 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/748087
Driving circuit Jun 19, 2024 Issued
Array ( [id] => 19469136 [patent_doc_number] => 20240322806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => Load Dependent Discharge For Voltage Controlled Oscillator-Based Charge Pump Regulator [patent_app_type] => utility [patent_app_number] => 18/678045 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5419 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18678045 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/678045
Load Dependent Discharge For Voltage Controlled Oscillator-Based Charge Pump Regulator May 29, 2024 Pending
Array ( [id] => 20318417 [patent_doc_number] => 12456975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-28 [patent_title] => Voltage supply switch interlock logic [patent_app_type] => utility [patent_app_number] => 18/664635 [patent_app_country] => US [patent_app_date] => 2024-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1143 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18664635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/664635
Voltage supply switch interlock logic May 14, 2024 Issued
Array ( [id] => 20216571 [patent_doc_number] => 12413230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Level shifting circuit [patent_app_type] => utility [patent_app_number] => 18/660251 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5867 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 391 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660251 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660251
Level shifting circuit May 9, 2024 Issued
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