Search

Siegfried H. Grimm

Examiner (ID: 11239)

Most Active Art Unit
2502
Art Unit(s)
2811, 2899, 2817, 2604, 2103, 2502, 2504, 2607
Total Applications
2132
Issued Applications
1976
Pending Applications
60
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4040863 [patent_doc_number] => 05942937 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Signal detection circuit using a plurality of delay stages with edge detection logic' [patent_app_type] => 1 [patent_app_number] => 8/974672 [patent_app_country] => US [patent_app_date] => 1997-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 5221 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/942/05942937.pdf [firstpage_image] =>[orig_patent_app_number] => 974672 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/974672
Signal detection circuit using a plurality of delay stages with edge detection logic Nov 18, 1997 Issued
Array ( [id] => 3982385 [patent_doc_number] => 05905414 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'VCO having control voltage and modulation signal applied to varactor' [patent_app_type] => 1 [patent_app_number] => 8/971693 [patent_app_country] => US [patent_app_date] => 1997-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2347 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/905/05905414.pdf [firstpage_image] =>[orig_patent_app_number] => 971693 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/971693
VCO having control voltage and modulation signal applied to varactor Nov 16, 1997 Issued
Array ( [id] => 4021978 [patent_doc_number] => 05880643 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Monolithic high frequency voltage controlled oscillator trimming circuit' [patent_app_type] => 1 [patent_app_number] => 8/971770 [patent_app_country] => US [patent_app_date] => 1997-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2209 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880643.pdf [firstpage_image] =>[orig_patent_app_number] => 971770 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/971770
Monolithic high frequency voltage controlled oscillator trimming circuit Nov 16, 1997 Issued
Array ( [id] => 4001142 [patent_doc_number] => 05920237 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Constant envelope quadrature-quadrature amplitude modulation system' [patent_app_type] => 1 [patent_app_number] => 8/971061 [patent_app_country] => US [patent_app_date] => 1997-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 3918 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920237.pdf [firstpage_image] =>[orig_patent_app_number] => 971061 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/971061
Constant envelope quadrature-quadrature amplitude modulation system Nov 13, 1997 Issued
Array ( [id] => 4023429 [patent_doc_number] => 05907263 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Bias current calibration of voltage controlled oscillator' [patent_app_type] => 1 [patent_app_number] => 8/970841 [patent_app_country] => US [patent_app_date] => 1997-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4653 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907263.pdf [firstpage_image] =>[orig_patent_app_number] => 970841 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/970841
Bias current calibration of voltage controlled oscillator Nov 13, 1997 Issued
90/004845 PHASED LOCKED LOOP TO PROVIDE PRECISE FREQUENCY AND PHASE TRACKING OF TWO SIGNALS Nov 12, 1997 Issued
Array ( [id] => 4032749 [patent_doc_number] => 05883551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Quadrature modulator malfunction estimator and modulator stage using it' [patent_app_type] => 1 [patent_app_number] => 8/969154 [patent_app_country] => US [patent_app_date] => 1997-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4317 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883551.pdf [firstpage_image] =>[orig_patent_app_number] => 969154 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/969154
Quadrature modulator malfunction estimator and modulator stage using it Nov 11, 1997 Issued
Array ( [id] => 3934902 [patent_doc_number] => 05877657 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'PLL clock generator having trimmable frequency dividers' [patent_app_type] => 1 [patent_app_number] => 8/979880 [patent_app_country] => US [patent_app_date] => 1997-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3687 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/877/05877657.pdf [firstpage_image] =>[orig_patent_app_number] => 979880 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/979880
PLL clock generator having trimmable frequency dividers Nov 11, 1997 Issued
Array ( [id] => 3963670 [patent_doc_number] => 05936462 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'AM demodulator using limiter amplifier RSSI output as baseband signal' [patent_app_type] => 1 [patent_app_number] => 8/968113 [patent_app_country] => US [patent_app_date] => 1997-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2454 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936462.pdf [firstpage_image] =>[orig_patent_app_number] => 968113 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/968113
AM demodulator using limiter amplifier RSSI output as baseband signal Nov 11, 1997 Issued
Array ( [id] => 4032692 [patent_doc_number] => 05883548 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Demodulation system and method for recovering a signal of interest from an undersampled, modulated carrier' [patent_app_type] => 1 [patent_app_number] => 8/967741 [patent_app_country] => US [patent_app_date] => 1997-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3159 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883548.pdf [firstpage_image] =>[orig_patent_app_number] => 967741 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/967741
Demodulation system and method for recovering a signal of interest from an undersampled, modulated carrier Nov 9, 1997 Issued
Array ( [id] => 3963831 [patent_doc_number] => 05936473 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Clock generator in which external oscillator is disabled after internal PLL becomes locked' [patent_app_type] => 1 [patent_app_number] => 8/964923 [patent_app_country] => US [patent_app_date] => 1997-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3477 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936473.pdf [firstpage_image] =>[orig_patent_app_number] => 964923 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/964923
Clock generator in which external oscillator is disabled after internal PLL becomes locked Nov 4, 1997 Issued
Array ( [id] => 4021991 [patent_doc_number] => 05880644 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'N-bit pulse width modulated signal generator' [patent_app_type] => 1 [patent_app_number] => 8/963781 [patent_app_country] => US [patent_app_date] => 1997-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4500 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880644.pdf [firstpage_image] =>[orig_patent_app_number] => 963781 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/963781
N-bit pulse width modulated signal generator Nov 3, 1997 Issued
Array ( [id] => 3847693 [patent_doc_number] => 05847611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-08 [patent_title] => 'Fractional divided frequency synthesizer with phase error compensating circuit' [patent_app_type] => 1 [patent_app_number] => 8/948022 [patent_app_country] => US [patent_app_date] => 1997-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 5996 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/847/05847611.pdf [firstpage_image] =>[orig_patent_app_number] => 948022 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/948022
Fractional divided frequency synthesizer with phase error compensating circuit Oct 9, 1997 Issued
Array ( [id] => 4246144 [patent_doc_number] => 06081164 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'PLL oscillator package and production method thereof' [patent_app_type] => 1 [patent_app_number] => 8/930861 [patent_app_country] => US [patent_app_date] => 1997-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 28 [patent_no_of_words] => 14630 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081164.pdf [firstpage_image] =>[orig_patent_app_number] => 930861 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/930861
PLL oscillator package and production method thereof Oct 6, 1997 Issued
Array ( [id] => 3893497 [patent_doc_number] => 05894246 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-13 [patent_title] => 'Automatically tuning a voltage controlled oscillator for minimum side band noise' [patent_app_type] => 1 [patent_app_number] => 8/939224 [patent_app_country] => US [patent_app_date] => 1997-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2877 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/894/05894246.pdf [firstpage_image] =>[orig_patent_app_number] => 939224 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/939224
Automatically tuning a voltage controlled oscillator for minimum side band noise Sep 28, 1997 Issued
Array ( [id] => 4115633 [patent_doc_number] => 06057739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Phase-locked loop with variable parameters' [patent_app_type] => 1 [patent_app_number] => 8/938183 [patent_app_country] => US [patent_app_date] => 1997-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4582 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057739.pdf [firstpage_image] =>[orig_patent_app_number] => 938183 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/938183
Phase-locked loop with variable parameters Sep 25, 1997 Issued
Array ( [id] => 3796796 [patent_doc_number] => 05841323 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Digital PLL using phase and frequency error calculating circuits' [patent_app_type] => 1 [patent_app_number] => 8/938320 [patent_app_country] => US [patent_app_date] => 1997-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6999 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841323.pdf [firstpage_image] =>[orig_patent_app_number] => 938320 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/938320
Digital PLL using phase and frequency error calculating circuits Sep 25, 1997 Issued
Array ( [id] => 4050448 [patent_doc_number] => 05874866 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => 'Phase-shift oscillator having ladder-type saw filter feedback circuit' [patent_app_type] => 1 [patent_app_number] => 8/937380 [patent_app_country] => US [patent_app_date] => 1997-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 27 [patent_no_of_words] => 5930 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/874/05874866.pdf [firstpage_image] =>[orig_patent_app_number] => 937380 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/937380
Phase-shift oscillator having ladder-type saw filter feedback circuit Sep 24, 1997 Issued
Array ( [id] => 3944830 [patent_doc_number] => 05872480 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Programmable down-sampler having plural decimators and modulator using same' [patent_app_type] => 1 [patent_app_number] => 8/935561 [patent_app_country] => US [patent_app_date] => 1997-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 6876 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872480.pdf [firstpage_image] =>[orig_patent_app_number] => 935561 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/935561
Programmable down-sampler having plural decimators and modulator using same Sep 22, 1997 Issued
Array ( [id] => 3767563 [patent_doc_number] => 05852385 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => 'Voltage controlled oscillator circuit composed of OTA-C filters' [patent_app_type] => 1 [patent_app_number] => 8/931962 [patent_app_country] => US [patent_app_date] => 1997-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 8561 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/852/05852385.pdf [firstpage_image] =>[orig_patent_app_number] => 931962 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/931962
Voltage controlled oscillator circuit composed of OTA-C filters Sep 16, 1997 Issued
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