Siming Liu

Array ( [id] => 9889427 [patent_doc_number] => 08975686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Semiconductor device including a floating gate' [patent_app_type] => utility [patent_app_number] => 14/201233 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 49 [patent_no_of_words] => 9837 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14201233 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9883175 [patent_doc_number] => 08969942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Non-volatile semiconductor memory device and its manufacturing method' [patent_app_type] => utility [patent_app_number] => 14/199864 [patent_app_country] => US [patent_app_date] => 2014-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 84 [patent_no_of_words] => 11703 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14199864 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9957866 [patent_doc_number] => 09006070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Two-step shallow trench isolation (STI) process' [patent_app_type] => utility [patent_app_number] => 14/189879 [patent_app_country] => US [patent_app_date] => 2014-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 2568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14189879 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10086194 [patent_doc_number] => 09123545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-01 [patent_title] => 'Semiconductor device with single-event latch-up prevention circuitry' [patent_app_type] => utility [patent_app_number] => 14/188461 [patent_app_country] => US [patent_app_date] => 2014-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3992 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14188461 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10645834 [patent_doc_number] => 09362715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Method for manufacturing gallium and nitrogen bearing laser devices with improved usage of substrate material' [patent_app_type] => utility [patent_app_number] => 14/176403 [patent_app_country] => US [patent_app_date] => 2014-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10500 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14176403 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9710672 [patent_doc_number] => 08835239 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-09-16 [patent_title] => 'Mixed mode multiple switch integration of multiple compound semiconductor FET devices' [patent_app_type] => utility [patent_app_number] => 14/166795 [patent_app_country] => US [patent_app_date] => 2014-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 41 [patent_no_of_words] => 17925 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14166795 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9488876 [patent_doc_number] => 20140139282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-22 [patent_title] => 'Embedded JFETs for High Voltage Applications' [patent_app_type] => utility [patent_app_number] => 14/166475 [patent_app_country] => US [patent_app_date] => 2014-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3798 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14166475 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9726425 [patent_doc_number] => 20140262130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'SMART HVAC MANIFOLD SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/160006 [patent_app_country] => US [patent_app_date] => 2014-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11905 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14160006 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9888868 [patent_doc_number] => 08975122 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Stacked bit line dual word line nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 14/148155 [patent_app_country] => US [patent_app_date] => 2014-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 8224 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14148155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10285909 [patent_doc_number] => 20150170907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'SULFUR-CONTAINING THIN FILMS' [patent_app_type] => utility [patent_app_number] => 14/133509 [patent_app_country] => US [patent_app_date] => 2013-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 16078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14133509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10286180 [patent_doc_number] => 20150171178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'DUAL SILICIDE INTEGRATION WITH LASER ANNEALING' [patent_app_type] => utility [patent_app_number] => 14/132002 [patent_app_country] => US [patent_app_date] => 2013-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6319 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14132002 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10286262 [patent_doc_number] => 20150171260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'Low Resistivity Nitrogen-Doped Zinc Telluride and Methods for Forming the Same' [patent_app_type] => utility [patent_app_number] => 14/108697 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4093 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14108697 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10144979 [patent_doc_number] => 09177791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Systems and methods for forming semiconductor devices' [patent_app_type] => utility [patent_app_number] => 14/105871 [patent_app_country] => US [patent_app_date] => 2013-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6968 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14105871 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10277422 [patent_doc_number] => 20150162419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/102515 [patent_app_country] => US [patent_app_date] => 2013-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4580 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14102515 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10277243 [patent_doc_number] => 20150162240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'TRENCH FORMATION USING ROUNDED HARD MASK' [patent_app_type] => utility [patent_app_number] => 14/103491 [patent_app_country] => US [patent_app_date] => 2013-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3139 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14103491 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10277195 [patent_doc_number] => 20150162192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'Method for Forming a Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 14/102107 [patent_app_country] => US [patent_app_date] => 2013-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7562 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14102107 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10277208 [patent_doc_number] => 20150162205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'Self-Aligned Double Spacer Patterning Process' [patent_app_type] => utility [patent_app_number] => 14/098315 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6573 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14098315 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10099844 [patent_doc_number] => 09136162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Trench formation using horn shaped spacer' [patent_app_type] => utility [patent_app_number] => 14/097617 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 4404 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097617 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10270263 [patent_doc_number] => 20150155260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-04 [patent_title] => 'Temporary Bonding Scheme' [patent_app_type] => utility [patent_app_number] => 14/097054 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1805 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097054 [rel_patent_id] =>[rel_patent_doc_number] =>)