
Sin J. Lee
Examiner (ID: 9312, Phone: (571)272-1333 , Office: P/1722 )
| Most Active Art Unit | 1722 |
| Art Unit(s) | 1752, 1722, 1795, 1613 |
| Total Applications | 1733 |
| Issued Applications | 1178 |
| Pending Applications | 124 |
| Abandoned Applications | 457 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 13199711
[patent_doc_number] => 10114774
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-30
[patent_title] => Data transfer method, parallel processing device, and recording medium
[patent_app_type] => utility
[patent_app_number] => 15/691975
[patent_app_country] => US
[patent_app_date] => 2017-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4602
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15691975
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/691975 | Data transfer method, parallel processing device, and recording medium | Aug 30, 2017 | Issued |
Array
(
[id] => 13268363
[patent_doc_number] => 10146265
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-12-04
[patent_title] => Main board slot power control circuit
[patent_app_type] => utility
[patent_app_number] => 15/692286
[patent_app_country] => US
[patent_app_date] => 2017-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2875
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15692286
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/692286 | Main board slot power control circuit | Aug 30, 2017 | Issued |
Array
(
[id] => 13029359
[patent_doc_number] => 10037300
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-31
[patent_title] => Cloud programming sensor interface architecture
[patent_app_type] => utility
[patent_app_number] => 15/682590
[patent_app_country] => US
[patent_app_date] => 2017-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4350
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15682590
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/682590 | Cloud programming sensor interface architecture | Aug 21, 2017 | Issued |
Array
(
[id] => 15854991
[patent_doc_number] => 10642781
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-05
[patent_title] => Boot time determination of calibration parameters for a component coupled to a system-on-chip
[patent_app_type] => utility
[patent_app_number] => 15/682296
[patent_app_country] => US
[patent_app_date] => 2017-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7830
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15682296
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/682296 | Boot time determination of calibration parameters for a component coupled to a system-on-chip | Aug 20, 2017 | Issued |
Array
(
[id] => 13752477
[patent_doc_number] => 10169185
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-01-01
[patent_title] => Efficient testing of direct memory address translation
[patent_app_type] => utility
[patent_app_number] => 15/675717
[patent_app_country] => US
[patent_app_date] => 2017-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3338
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15675717
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/675717 | Efficient testing of direct memory address translation | Aug 11, 2017 | Issued |
Array
(
[id] => 14555765
[patent_doc_number] => 10346344
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-07-09
[patent_title] => Method, client device and data forwarding device for transmitting data through serial port
[patent_app_type] => utility
[patent_app_number] => 15/743533
[patent_app_country] => US
[patent_app_date] => 2017-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 9438
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15743533
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/743533 | Method, client device and data forwarding device for transmitting data through serial port | Aug 10, 2017 | Issued |
Array
(
[id] => 12760888
[patent_doc_number] => 20180145464
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-24
[patent_title] => Modular Lighting and Ancillary Component Apparatus and System
[patent_app_type] => utility
[patent_app_number] => 15/669925
[patent_app_country] => US
[patent_app_date] => 2017-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3010
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15669925
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/669925 | Modular Lighting and Ancillary Component Apparatus and System | Aug 4, 2017 | Abandoned |
Array
(
[id] => 12180654
[patent_doc_number] => 20180039591
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-08
[patent_title] => 'METHOD AND DEVICE FOR OPERATING A BUS SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 15/661144
[patent_app_country] => US
[patent_app_date] => 2017-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3165
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15661144
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/661144 | Method and device for operating a bus system | Jul 26, 2017 | Issued |
Array
(
[id] => 13975221
[patent_doc_number] => 10216967
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-26
[patent_title] => Volatile memory-based data-transfer device with automatic and user-initiated anti-tamper penalties
[patent_app_type] => utility
[patent_app_number] => 15/659519
[patent_app_country] => US
[patent_app_date] => 2017-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 2196
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15659519
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/659519 | Volatile memory-based data-transfer device with automatic and user-initiated anti-tamper penalties | Jul 24, 2017 | Issued |
Array
(
[id] => 12004340
[patent_doc_number] => 20170308495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-26
[patent_title] => 'CONNECTOR WITH A TERMINATION MODULE'
[patent_app_type] => utility
[patent_app_number] => 15/645533
[patent_app_country] => US
[patent_app_date] => 2017-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6010
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15645533
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/645533 | Connector with a termination module | Jul 9, 2017 | Issued |
Array
(
[id] => 12180661
[patent_doc_number] => 20180039597
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-08
[patent_title] => 'PORT MULTIPLIER SYSTEM AND OPERATION METHOD'
[patent_app_type] => utility
[patent_app_number] => 15/643495
[patent_app_country] => US
[patent_app_date] => 2017-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4723
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15643495
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/643495 | Port multiplier system and operation method | Jul 6, 2017 | Issued |
Array
(
[id] => 13797309
[patent_doc_number] => 20190012193
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-10
[patent_title] => VIRTIO RELAY
[patent_app_type] => utility
[patent_app_number] => 15/644636
[patent_app_country] => US
[patent_app_date] => 2017-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8514
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15644636
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/644636 | Virtio relay | Jul 6, 2017 | Issued |
Array
(
[id] => 12153685
[patent_doc_number] => 20180024949
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-25
[patent_title] => 'METHOD OF ACHIEVING LOW WRITE LATENCY IN A DATA STORAGE SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 15/644325
[patent_app_country] => US
[patent_app_date] => 2017-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3442
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15644325
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/644325 | Method of achieving low write latency in a data storage system | Jul 6, 2017 | Issued |
Array
(
[id] => 13255063
[patent_doc_number] => 10140222
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-11-27
[patent_title] => Interface components
[patent_app_type] => utility
[patent_app_number] => 15/642906
[patent_app_country] => US
[patent_app_date] => 2017-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6544
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15642906
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/642906 | Interface components | Jul 5, 2017 | Issued |
Array
(
[id] => 13782901
[patent_doc_number] => 20190004989
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-03
[patent_title] => External Resource Discovery and Coordination in a Data Center
[patent_app_type] => utility
[patent_app_number] => 15/639035
[patent_app_country] => US
[patent_app_date] => 2017-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9146
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15639035
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/639035 | External resource discovery and coordination in a data center | Jun 29, 2017 | Issued |
Array
(
[id] => 16355337
[patent_doc_number] => 10795849
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-06
[patent_title] => System of automation components and method for operating the same
[patent_app_type] => utility
[patent_app_number] => 16/315476
[patent_app_country] => US
[patent_app_date] => 2017-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3404
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16315476
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/315476 | System of automation components and method for operating the same | Jun 19, 2017 | Issued |
Array
(
[id] => 15670727
[patent_doc_number] => 10599594
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-03-24
[patent_title] => High performance computing network
[patent_app_type] => utility
[patent_app_number] => 16/309762
[patent_app_country] => US
[patent_app_date] => 2017-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 9
[patent_no_of_words] => 5203
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16309762
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/309762 | High performance computing network | Jun 14, 2017 | Issued |
Array
(
[id] => 15731183
[patent_doc_number] => 10614020
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-04-07
[patent_title] => Switch for reversible interface
[patent_app_type] => utility
[patent_app_number] => 16/314159
[patent_app_country] => US
[patent_app_date] => 2017-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 4211
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16314159
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/314159 | Switch for reversible interface | Jun 12, 2017 | Issued |
Array
(
[id] => 11982200
[patent_doc_number] => 20170286353
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-05
[patent_title] => 'PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) CARD HAVING MULTIPLE PCIE CONNECTORS'
[patent_app_type] => utility
[patent_app_number] => 15/621825
[patent_app_country] => US
[patent_app_date] => 2017-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5519
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15621825
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/621825 | Peripheral component interconnect express (PCIE) card having multiple PCIE connectors | Jun 12, 2017 | Issued |
Array
(
[id] => 14287151
[patent_doc_number] => 20190140860
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-09
[patent_title] => PASSENGER TRANSPORT SYSTEM WITH CENTRAL CONTROL UNIT AND MULTIPLE FIELD DEVICES WHICH COMMUNICATE WITH DATA TELEGRAMS PRIORITIZED BY WAITING PERIODS
[patent_app_type] => utility
[patent_app_number] => 16/304322
[patent_app_country] => US
[patent_app_date] => 2017-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8501
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16304322
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/304322 | Passenger transport system with central control unit and multiple field devices which communicate with data telegrams prioritized by waiting periods | Jun 6, 2017 | Issued |