Search

Sin J. Lee

Examiner (ID: 9312, Phone: (571)272-1333 , Office: P/1722 )

Most Active Art Unit
1722
Art Unit(s)
1752, 1722, 1795, 1613
Total Applications
1733
Issued Applications
1178
Pending Applications
124
Abandoned Applications
457

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11924649 [patent_doc_number] => 09792233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Techniques for escalating interrupts in a data processing system to a higher software stack level' [patent_app_type] => utility [patent_app_number] => 15/339469 [patent_app_country] => US [patent_app_date] => 2016-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 25 [patent_no_of_words] => 10268 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15339469 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/339469
Techniques for escalating interrupts in a data processing system to a higher software stack level Oct 30, 2016 Issued
Array ( [id] => 13449261 [patent_doc_number] => 20180276173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => COMMUNICATIONS DEVICE [patent_app_type] => utility [patent_app_number] => 15/765616 [patent_app_country] => US [patent_app_date] => 2016-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5923 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -38 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15765616 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/765616
Communications device for routing signals on communications networks Oct 13, 2016 Issued
Array ( [id] => 11397053 [patent_doc_number] => 20170017589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-19 [patent_title] => 'AGGREGATION OF INTERRUPTS USING EVENT QUEUES' [patent_app_type] => utility [patent_app_number] => 15/277146 [patent_app_country] => US [patent_app_date] => 2016-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10552 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15277146 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/277146
Aggregation of interrupts using event queues Sep 26, 2016 Issued
Array ( [id] => 11810900 [patent_doc_number] => 09715470 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-25 [patent_title] => 'Direct memory access between an accelerator and a processor using a coherency adapter' [patent_app_type] => utility [patent_app_number] => 15/275865 [patent_app_country] => US [patent_app_date] => 2016-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15275865 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/275865
Direct memory access between an accelerator and a processor using a coherency adapter Sep 25, 2016 Issued
Array ( [id] => 13281719 [patent_doc_number] => 10152444 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-12-11 [patent_title] => Synchronous link training [patent_app_type] => utility [patent_app_number] => 15/275314 [patent_app_country] => US [patent_app_date] => 2016-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4704 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15275314 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/275314
Synchronous link training Sep 22, 2016 Issued
Array ( [id] => 11570659 [patent_doc_number] => 20170109303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'Data output dispatching device and method' [patent_app_type] => utility [patent_app_number] => 15/265450 [patent_app_country] => US [patent_app_date] => 2016-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9248 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15265450 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/265450
Data output dispatching device and method Sep 13, 2016 Issued
Array ( [id] => 11459016 [patent_doc_number] => 20170052922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-23 [patent_title] => 'Detachable Computer With Variable Performance Computing Environment' [patent_app_type] => utility [patent_app_number] => 15/246305 [patent_app_country] => US [patent_app_date] => 2016-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11698 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15246305 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/246305
Detachable computer with variable performance computing environment Aug 23, 2016 Issued
Array ( [id] => 13199723 [patent_doc_number] => 10114780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-30 [patent_title] => Information processing apparatus that permits use of a USB device by an application being displayed, method of controlling the same and non-transitory computer readable medium [patent_app_type] => utility [patent_app_number] => 15/238077 [patent_app_country] => US [patent_app_date] => 2016-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 9622 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15238077 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/238077
Information processing apparatus that permits use of a USB device by an application being displayed, method of controlling the same and non-transitory computer readable medium Aug 15, 2016 Issued
Array ( [id] => 12229021 [patent_doc_number] => 09916266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-13 [patent_title] => 'High performance interconnect physical layer' [patent_app_type] => utility [patent_app_number] => 15/237291 [patent_app_country] => US [patent_app_date] => 2016-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 22386 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15237291 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/237291
High performance interconnect physical layer Aug 14, 2016 Issued
Array ( [id] => 14719977 [patent_doc_number] => 20190251052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => USB BAITING METHOD AND DESIGN [patent_app_type] => utility [patent_app_number] => 16/320523 [patent_app_country] => US [patent_app_date] => 2016-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4892 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16320523 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/320523
USB baiting method and design Aug 10, 2016 Issued
Array ( [id] => 13241001 [patent_doc_number] => 10133699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Hot-plug of devices in virtualized computer systems [patent_app_type] => utility [patent_app_number] => 15/229944 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229944 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229944
Hot-plug of devices in virtualized computer systems Aug 4, 2016 Issued
Array ( [id] => 11423720 [patent_doc_number] => 20170031864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'FLASH CONTROLLER TO PROVIDE A VALUE THAT REPRESENTS A PARAMETER TO A FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 15/228614 [patent_app_country] => US [patent_app_date] => 2016-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 13091 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15228614 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/228614
Flash controller to provide a value that represents a parameter to a flash memory Aug 3, 2016 Issued
Array ( [id] => 11272669 [patent_doc_number] => 20160335216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'PCIE LANE AGGREGATION OVER A HIGH SPEED LINK' [patent_app_type] => utility [patent_app_number] => 15/223412 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6084 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223412 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/223412
PCIe lane aggregation over a high speed link Jul 28, 2016 Issued
Array ( [id] => 15373559 [patent_doc_number] => 10528498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Transfer apparatus and frame transfer method [patent_app_type] => utility [patent_app_number] => 16/303309 [patent_app_country] => US [patent_app_date] => 2016-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7826 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16303309 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/303309
Transfer apparatus and frame transfer method Jul 27, 2016 Issued
Array ( [id] => 11109660 [patent_doc_number] => 20160306630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'INTERRUPT RETURN INSTRUCTION WITH EMBEDDED INTERRUPT SERVICE FUNCTIONALITY' [patent_app_type] => utility [patent_app_number] => 15/194558 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4028 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15194558 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/194558
Interrupt return instruction with embedded interrupt service functionality Jun 26, 2016 Issued
Array ( [id] => 13797509 [patent_doc_number] => 20190012293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => METHOD AND SYSTEM FOR HIGH PERFORMANCE REAL TIME PATTERN RECOGNITION [patent_app_type] => utility [patent_app_number] => 15/737151 [patent_app_country] => US [patent_app_date] => 2016-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15737151 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/737151
Method and system for high performance real time pattern recognition Jun 16, 2016 Issued
Array ( [id] => 14011287 [patent_doc_number] => 10224118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Method and system for checking the compatibility of device components of a medical device [patent_app_type] => utility [patent_app_number] => 15/183972 [patent_app_country] => US [patent_app_date] => 2016-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5908 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15183972 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/183972
Method and system for checking the compatibility of device components of a medical device Jun 15, 2016 Issued
Array ( [id] => 11102731 [patent_doc_number] => 20160299702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'ACCESS TO STORAGE RESOURCES USING A VIRTUAL STORAGE APPLIANCE' [patent_app_type] => utility [patent_app_number] => 15/183107 [patent_app_country] => US [patent_app_date] => 2016-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5537 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15183107 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/183107
Access to storage resources using a virtual storage appliance Jun 14, 2016 Issued
Array ( [id] => 12537669 [patent_doc_number] => 10009424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Synchronous input/output initialization exchange sequences [patent_app_type] => utility [patent_app_number] => 15/183139 [patent_app_country] => US [patent_app_date] => 2016-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11236 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15183139 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/183139
Synchronous input/output initialization exchange sequences Jun 14, 2016 Issued
Array ( [id] => 12495099 [patent_doc_number] => 09996318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-12 [patent_title] => FIFO memory having a memory region modifiable during operation [patent_app_type] => utility [patent_app_number] => 15/157989 [patent_app_country] => US [patent_app_date] => 2016-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2437 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15157989 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/157989
FIFO memory having a memory region modifiable during operation May 17, 2016 Issued
Menu