
Sinh N. Tran
Supervisory Patent Examiner (ID: 18824, Phone: (571)272-7564 , Office: P/2661 )
| Most Active Art Unit | 2608 |
| Art Unit(s) | 2743, 2605, 2696, 2622, 2643, 2608, 2504, 2747, 2651, 2615, 2661, 2637, 2644 |
| Total Applications | 605 |
| Issued Applications | 455 |
| Pending Applications | 52 |
| Abandoned Applications | 100 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5307133
[patent_doc_number] => 20090014414
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-15
[patent_title] => 'SUBSTRATE PROCESSING METHOD, SUBSTRATE PROCESSING SYSTEM, AND COMPUTER-READABLE STORAGE MEDIUM'
[patent_app_type] => utility
[patent_app_number] => 11/870641
[patent_app_country] => US
[patent_app_date] => 2007-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7095
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0014/20090014414.pdf
[firstpage_image] =>[orig_patent_app_number] => 11870641
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/870641 | Substrate processing method, substrate processing system, and computer-readable storage medium | Oct 10, 2007 | Issued |
Array
(
[id] => 4743034
[patent_doc_number] => 20080087635
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-17
[patent_title] => 'Method of etching a nickel oxide layer and method of manufacturing a storage node'
[patent_app_type] => utility
[patent_app_number] => 11/907091
[patent_app_country] => US
[patent_app_date] => 2007-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4795
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0087/20080087635.pdf
[firstpage_image] =>[orig_patent_app_number] => 11907091
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/907091 | Method of etching a nickel oxide layer and method of manufacturing a storage node | Oct 8, 2007 | Abandoned |
Array
(
[id] => 7550650
[patent_doc_number] => 08062982
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-22
[patent_title] => 'High yield plasma etch process for interlayer dielectrics'
[patent_app_type] => utility
[patent_app_number] => 11/867972
[patent_app_country] => US
[patent_app_date] => 2007-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 8993
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/062/08062982.pdf
[firstpage_image] =>[orig_patent_app_number] => 11867972
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/867972 | High yield plasma etch process for interlayer dielectrics | Oct 4, 2007 | Issued |
Array
(
[id] => 4723461
[patent_doc_number] => 20080203055
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-28
[patent_title] => 'Method of forming one or more nanopores for aligning molecules for molecular electronics'
[patent_app_type] => utility
[patent_app_number] => 11/906819
[patent_app_country] => US
[patent_app_date] => 2007-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2831
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0203/20080203055.pdf
[firstpage_image] =>[orig_patent_app_number] => 11906819
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/906819 | Method of forming one or more nanopores for aligning molecules for molecular electronics | Oct 2, 2007 | Issued |
Array
(
[id] => 8305306
[patent_doc_number] => 08226837
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-24
[patent_title] => 'Mold for optical device with anti-reflection structure, method for producing the same, and optical device'
[patent_app_type] => utility
[patent_app_number] => 12/515188
[patent_app_country] => US
[patent_app_date] => 2007-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4364
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12515188
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/515188 | Mold for optical device with anti-reflection structure, method for producing the same, and optical device | Oct 1, 2007 | Issued |
Array
(
[id] => 4525714
[patent_doc_number] => 07922920
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-04-12
[patent_title] => 'Systems, methods, and apparatus of a low conductance silicon micro-leak for mass spectrometer inlet'
[patent_app_type] => utility
[patent_app_number] => 11/862550
[patent_app_country] => US
[patent_app_date] => 2007-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4931
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 223
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/922/07922920.pdf
[firstpage_image] =>[orig_patent_app_number] => 11862550
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/862550 | Systems, methods, and apparatus of a low conductance silicon micro-leak for mass spectrometer inlet | Sep 26, 2007 | Issued |
Array
(
[id] => 4775498
[patent_doc_number] => 20080283496
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-20
[patent_title] => 'METHOD FOR ETCHING AND FOR FORMING A CONTACT HOLE USING THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/855210
[patent_app_country] => US
[patent_app_date] => 2007-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 20101
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0283/20080283496.pdf
[firstpage_image] =>[orig_patent_app_number] => 11855210
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/855210 | METHOD FOR ETCHING AND FOR FORMING A CONTACT HOLE USING THEREOF | Sep 13, 2007 | Abandoned |
Array
(
[id] => 4634432
[patent_doc_number] => 08012883
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-09-06
[patent_title] => 'Stripping method'
[patent_app_type] => utility
[patent_app_number] => 11/897383
[patent_app_country] => US
[patent_app_date] => 2007-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6260
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/012/08012883.pdf
[firstpage_image] =>[orig_patent_app_number] => 11897383
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/897383 | Stripping method | Aug 28, 2007 | Issued |
Array
(
[id] => 4529008
[patent_doc_number] => 07923375
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-04-12
[patent_title] => 'Method for manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/892131
[patent_app_country] => US
[patent_app_date] => 2007-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3131
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/923/07923375.pdf
[firstpage_image] =>[orig_patent_app_number] => 11892131
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/892131 | Method for manufacturing semiconductor device | Aug 19, 2007 | Issued |
Array
(
[id] => 7518869
[patent_doc_number] => 07972970
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-07-05
[patent_title] => 'Fabrication of semiconductor interconnect structure'
[patent_app_type] => utility
[patent_app_number] => 11/888312
[patent_app_country] => US
[patent_app_date] => 2007-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 25
[patent_no_of_words] => 17215
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/972/07972970.pdf
[firstpage_image] =>[orig_patent_app_number] => 11888312
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/888312 | Fabrication of semiconductor interconnect structure | Jul 29, 2007 | Issued |
Array
(
[id] => 5520441
[patent_doc_number] => 20090028422
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-29
[patent_title] => 'Systems and Methods for Detecting Watermark Formations on Semiconductor Wafers'
[patent_app_type] => utility
[patent_app_number] => 11/829581
[patent_app_country] => US
[patent_app_date] => 2007-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2831
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0028/20090028422.pdf
[firstpage_image] =>[orig_patent_app_number] => 11829581
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/829581 | Systems and methods for detecting watermark formations on semiconductor wafers | Jul 26, 2007 | Issued |
Array
(
[id] => 4733940
[patent_doc_number] => 20080050919
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-28
[patent_title] => 'HIGH ASPECT RATIO VIA ETCH'
[patent_app_type] => utility
[patent_app_number] => 11/782496
[patent_app_country] => US
[patent_app_date] => 2007-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8794
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0050/20080050919.pdf
[firstpage_image] =>[orig_patent_app_number] => 11782496
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/782496 | High aspect ratio via etch | Jul 23, 2007 | Issued |
Array
(
[id] => 5199227
[patent_doc_number] => 20070298545
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-27
[patent_title] => 'METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/780585
[patent_app_country] => US
[patent_app_date] => 2007-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 5516
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0298/20070298545.pdf
[firstpage_image] =>[orig_patent_app_number] => 11780585
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/780585 | Method of manufacturing a semiconductor device | Jul 19, 2007 | Issued |
Array
(
[id] => 5422575
[patent_doc_number] => 20090149030
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-11
[patent_title] => 'OXIDE ETCHING METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/305099
[patent_app_country] => US
[patent_app_date] => 2006-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 10179
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0149/20090149030.pdf
[firstpage_image] =>[orig_patent_app_number] => 12305099
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/305099 | Oxide etching method | Jul 17, 2007 | Issued |
Array
(
[id] => 9588678
[patent_doc_number] => 08778217
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-15
[patent_title] => 'Polishing slurry for CMP, and polishing method'
[patent_app_type] => utility
[patent_app_number] => 12/307440
[patent_app_country] => US
[patent_app_date] => 2007-07-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 14547
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 23
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12307440
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/307440 | Polishing slurry for CMP, and polishing method | Jul 3, 2007 | Issued |
Array
(
[id] => 8571666
[patent_doc_number] => 08338311
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-12-25
[patent_title] => 'Method for the production of structured layers of titanium and nickel'
[patent_app_type] => utility
[patent_app_number] => 12/306646
[patent_app_country] => US
[patent_app_date] => 2007-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 28
[patent_no_of_words] => 5772
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12306646
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/306646 | Method for the production of structured layers of titanium and nickel | Jun 26, 2007 | Issued |
Array
(
[id] => 5480257
[patent_doc_number] => 20090203214
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-08-13
[patent_title] => 'SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE OBTAINED BY SUCH A METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/304332
[patent_app_country] => US
[patent_app_date] => 2007-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2945
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0203/20090203214.pdf
[firstpage_image] =>[orig_patent_app_number] => 12304332
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/304332 | Semiconductor device, and semiconductor device obtained by such a method | Jun 5, 2007 | Issued |
Array
(
[id] => 5007700
[patent_doc_number] => 20070278177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-06
[patent_title] => 'Processing method using atomic force microscope microfabrication device'
[patent_app_type] => utility
[patent_app_number] => 11/809518
[patent_app_country] => US
[patent_app_date] => 2007-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3305
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0278/20070278177.pdf
[firstpage_image] =>[orig_patent_app_number] => 11809518
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/809518 | Processing method using atomic force microscope microfabrication device | May 31, 2007 | Abandoned |
Array
(
[id] => 5059973
[patent_doc_number] => 20070221609
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-27
[patent_title] => 'METHOD FOR PURIFYING SILICON CARBIDE COATED STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 11/755472
[patent_app_country] => US
[patent_app_date] => 2007-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5043
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0221/20070221609.pdf
[firstpage_image] =>[orig_patent_app_number] => 11755472
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/755472 | Method for purifying silicon carbide coated structures | May 29, 2007 | Issued |
Array
(
[id] => 4483925
[patent_doc_number] => 07902080
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-08
[patent_title] => 'Deposition-plasma cure cycle process to enhance film quality of silicon dioxide'
[patent_app_type] => utility
[patent_app_number] => 11/753968
[patent_app_country] => US
[patent_app_date] => 2007-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 7054
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/902/07902080.pdf
[firstpage_image] =>[orig_patent_app_number] => 11753968
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/753968 | Deposition-plasma cure cycle process to enhance film quality of silicon dioxide | May 24, 2007 | Issued |