
Son Luu Mai
Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2818, 2511, 2827 |
| Total Applications | 3061 |
| Issued Applications | 2917 |
| Pending Applications | 43 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6754598
[patent_doc_number] => 20030002374
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-02
[patent_title] => 'Charging a capacitance of a memory cell and charger'
[patent_app_type] => new
[patent_app_number] => 10/154019
[patent_app_country] => US
[patent_app_date] => 2002-05-23
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Array
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[patent_issue_date] => 2003-01-09
[patent_title] => 'Method for reading and storing binary memory cell signals and circuit arrangement'
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Array
(
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[patent_issue_date] => 2003-10-28
[patent_title] => 'Sensing method for EEPROM refresh scheme'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/151150 | Sensing method for EEPROM refresh scheme | May 20, 2002 | Issued |
Array
(
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[patent_kind] => B1
[patent_issue_date] => 2003-09-09
[patent_title] => 'Content addressable memory (CAM) with error checking and correction (ECC) capability'
[patent_app_type] => B1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/146154 | Content addressable memory (CAM) with error checking and correction (ECC) capability | May 14, 2002 | Issued |
Array
(
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[patent_issue_date] => 2003-07-15
[patent_title] => 'System for reading a double-bit memory cell'
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Array
(
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[patent_kind] => B1
[patent_issue_date] => 2003-05-20
[patent_title] => 'Memory device and method for reliably reading multi-bit data from a write-many memory cell'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/144451 | Memory device and method for reliably reading multi-bit data from a write-many memory cell | May 8, 2002 | Issued |
Array
(
[id] => 1038940
[patent_doc_number] => 06873540
[patent_country] => US
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[patent_issue_date] => 2005-03-29
[patent_title] => 'Molecular memory cell'
[patent_app_type] => utility
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[patent_app_country] => US
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Array
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[id] => 6546685
[patent_doc_number] => 20020163829
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[patent_kind] => A1
[patent_issue_date] => 2002-11-07
[patent_title] => 'Memory switch'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/139746 | Addressable and electrically reversible memory switch | May 6, 2002 | Issued |
Array
(
[id] => 7633734
[patent_doc_number] => 06657886
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-12-02
[patent_title] => 'Split local and continuous bitline for fast domino read SRAM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/140549 | Split local and continuous bitline for fast domino read SRAM | May 6, 2002 | Issued |
Array
(
[id] => 1376890
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[patent_issue_date] => 2003-05-27
[patent_title] => 'Design for test to emulate a read with worse case test pattern'
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Array
(
[id] => 1194860
[patent_doc_number] => 06731528
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[patent_title] => 'Dual write cycle programmable conductor memory system and method of operation'
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Array
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[id] => 1372575
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Array
(
[id] => 7624524
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[patent_title] => 'Low remanence flux concentrator for MRAM devices'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/137500 | Low remanence flux concentrator for MRAM devices | May 1, 2002 | Issued |
Array
(
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Array
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[patent_title] => 'LOW VOLTAGE CHARGE PUMP APPARATUS AND METHOD'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/136742 | Low voltage charge pump apparatus and method | Apr 29, 2002 | Issued |
Array
(
[id] => 7633732
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[patent_title] => 'Application of high spin polarization materials in two terminal non-volatile bistable memory devices'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/132248 | Semiconductor device in which a chip is supplied either a first voltage or a second voltage | Apr 25, 2002 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/133946 | Bitline splitter | Apr 24, 2002 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/063452 | Dual-bank memory module with stacked DRAM chips having a concave-shaped re-route PCB in-between | Apr 23, 2002 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/126450 | Dual reference cell for split-gate nonvolatile semiconductor memory | Apr 18, 2002 | Issued |