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Son Luu Mai

Examiner (ID: 18155)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1428285 [patent_doc_number] => 06507521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-14 [patent_title] => 'Semiconductor memory system' [patent_app_type] => B2 [patent_app_number] => 10/136281 [patent_app_country] => US [patent_app_date] => 2002-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 13071 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/507/06507521.pdf [firstpage_image] =>[orig_patent_app_number] => 10136281 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/136281
Semiconductor memory system May 1, 2002 Issued
Array ( [id] => 7624524 [patent_doc_number] => 06724652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-20 [patent_title] => 'Low remanence flux concentrator for MRAM devices' [patent_app_type] => B2 [patent_app_number] => 10/137500 [patent_app_country] => US [patent_app_date] => 2002-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 36 [patent_no_of_words] => 8561 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/724/06724652.pdf [firstpage_image] =>[orig_patent_app_number] => 10137500 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/137500
Low remanence flux concentrator for MRAM devices May 1, 2002 Issued
Array ( [id] => 7633732 [patent_doc_number] => 06657888 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-02 [patent_title] => 'Application of high spin polarization materials in two terminal non-volatile bistable memory devices' [patent_app_type] => B1 [patent_app_number] => 10/135348 [patent_app_country] => US [patent_app_date] => 2002-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4888 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/657/06657888.pdf [firstpage_image] =>[orig_patent_app_number] => 10135348 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/135348
Application of high spin polarization materials in two terminal non-volatile bistable memory devices Apr 29, 2002 Issued
Array ( [id] => 6749122 [patent_doc_number] => 20030043642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'LOW VOLTAGE CHARGE PUMP APPARATUS AND METHOD' [patent_app_type] => new [patent_app_number] => 10/136742 [patent_app_country] => US [patent_app_date] => 2002-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4637 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20030043642.pdf [firstpage_image] =>[orig_patent_app_number] => 10136742 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/136742
Low voltage charge pump apparatus and method Apr 29, 2002 Issued
Array ( [id] => 6507485 [patent_doc_number] => 20020191469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-19 [patent_title] => 'Semiconductor device and method of the semiconductor device' [patent_app_type] => new [patent_app_number] => 10/132248 [patent_app_country] => US [patent_app_date] => 2002-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 13792 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20020191469.pdf [firstpage_image] =>[orig_patent_app_number] => 10132248 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/132248
Semiconductor device in which a chip is supplied either a first voltage or a second voltage Apr 25, 2002 Issued
Array ( [id] => 1358370 [patent_doc_number] => 06580635 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Bitline splitter' [patent_app_type] => B1 [patent_app_number] => 10/133946 [patent_app_country] => US [patent_app_date] => 2002-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1506 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580635.pdf [firstpage_image] =>[orig_patent_app_number] => 10133946 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/133946
Bitline splitter Apr 24, 2002 Issued
Array ( [id] => 1413375 [patent_doc_number] => 06542393 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-01 [patent_title] => 'Dual-bank memory module with stacked DRAM chips having a concave-shaped re-route PCB in-between' [patent_app_type] => B1 [patent_app_number] => 10/063452 [patent_app_country] => US [patent_app_date] => 2002-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4603 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/542/06542393.pdf [firstpage_image] =>[orig_patent_app_number] => 10063452 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/063452
Dual-bank memory module with stacked DRAM chips having a concave-shaped re-route PCB in-between Apr 23, 2002 Issued
Array ( [id] => 7623003 [patent_doc_number] => 06687162 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'Dual reference cell for split-gate nonvolatile semiconductor memory' [patent_app_type] => B1 [patent_app_number] => 10/126450 [patent_app_country] => US [patent_app_date] => 2002-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4611 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/687/06687162.pdf [firstpage_image] =>[orig_patent_app_number] => 10126450 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/126450
Dual reference cell for split-gate nonvolatile semiconductor memory Apr 18, 2002 Issued
Array ( [id] => 6107786 [patent_doc_number] => 20020171437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'Semiconductor memory device having noise tolerant input buffer' [patent_app_type] => new [patent_app_number] => 10/124854 [patent_app_country] => US [patent_app_date] => 2002-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3755 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20020171437.pdf [firstpage_image] =>[orig_patent_app_number] => 10124854 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/124854
Semiconductor memory device having noise tolerant input buffer Apr 17, 2002 Issued
Array ( [id] => 6268892 [patent_doc_number] => 20020104872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Method and apparatus for securing electronic circuits' [patent_app_type] => new [patent_app_number] => 10/120243 [patent_app_country] => US [patent_app_date] => 2002-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4265 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20020104872.pdf [firstpage_image] =>[orig_patent_app_number] => 10120243 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/120243
Method and apparatus for securing electronic circuits Apr 9, 2002 Abandoned
Array ( [id] => 7632121 [patent_doc_number] => 06665215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-16 [patent_title] => 'Memory cell read device with a precharge amplifier and associated methods' [patent_app_type] => B2 [patent_app_number] => 10/117448 [patent_app_country] => US [patent_app_date] => 2002-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2475 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/665/06665215.pdf [firstpage_image] =>[orig_patent_app_number] => 10117448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/117448
Memory cell read device with a precharge amplifier and associated methods Apr 4, 2002 Issued
Array ( [id] => 6435609 [patent_doc_number] => 20020176289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Method of erasing a FAMOS memory cell and a corresponding memory cell' [patent_app_type] => new [patent_app_number] => 10/117446 [patent_app_country] => US [patent_app_date] => 2002-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2698 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20020176289.pdf [firstpage_image] =>[orig_patent_app_number] => 10117446 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/117446
Method of erasing a FAMOS memory cell and a corresponding memory cell Apr 3, 2002 Issued
Array ( [id] => 1389795 [patent_doc_number] => 06563735 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'NOR-structured semiconductor memory device' [patent_app_type] => B1 [patent_app_number] => 10/117148 [patent_app_country] => US [patent_app_date] => 2002-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2905 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/563/06563735.pdf [firstpage_image] =>[orig_patent_app_number] => 10117148 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/117148
NOR-structured semiconductor memory device Apr 3, 2002 Issued
Array ( [id] => 6534318 [patent_doc_number] => 20020110019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/114960 [patent_app_country] => US [patent_app_date] => 2002-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 23973 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20020110019.pdf [firstpage_image] =>[orig_patent_app_number] => 10114960 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/114960
Nonvolatile semiconductor memory device Apr 1, 2002 Issued
Array ( [id] => 6173028 [patent_doc_number] => 20020154538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Magnetic memory and driving method therefor' [patent_app_type] => new [patent_app_number] => 10/112748 [patent_app_country] => US [patent_app_date] => 2002-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7080 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20020154538.pdf [firstpage_image] =>[orig_patent_app_number] => 10112748 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/112748
Magnetic memory and driving method therefor Apr 1, 2002 Issued
Array ( [id] => 1180215 [patent_doc_number] => 06751128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Semiconductor memory device having shortened testing time' [patent_app_type] => B2 [patent_app_number] => 10/106351 [patent_app_country] => US [patent_app_date] => 2002-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 42 [patent_no_of_words] => 31060 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751128.pdf [firstpage_image] =>[orig_patent_app_number] => 10106351 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/106351
Semiconductor memory device having shortened testing time Mar 26, 2002 Issued
Array ( [id] => 6859934 [patent_doc_number] => 20030090942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/106046 [patent_app_country] => US [patent_app_date] => 2002-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8000 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20030090942.pdf [firstpage_image] =>[orig_patent_app_number] => 10106046 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/106046
Semiconductor device having a defect relief function of relieving a failure Mar 26, 2002 Issued
Array ( [id] => 1303631 [patent_doc_number] => 06628538 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-30 [patent_title] => 'Memory module including module data wirings available as a memory access data bus' [patent_app_type] => B2 [patent_app_number] => 10/105249 [patent_app_country] => US [patent_app_date] => 2002-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 62 [patent_no_of_words] => 13582 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/628/06628538.pdf [firstpage_image] =>[orig_patent_app_number] => 10105249 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/105249
Memory module including module data wirings available as a memory access data bus Mar 25, 2002 Issued
Array ( [id] => 1292102 [patent_doc_number] => 06639862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-28 [patent_title] => 'Semiconductor memory with refresh and method for operating the semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 10/105547 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6729 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/639/06639862.pdf [firstpage_image] =>[orig_patent_app_number] => 10105547 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/105547
Semiconductor memory with refresh and method for operating the semiconductor memory Mar 24, 2002 Issued
Array ( [id] => 6520004 [patent_doc_number] => 20020136061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-26 [patent_title] => 'Method and memory system for writing in data' [patent_app_type] => new [patent_app_number] => 10/105546 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4562 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0136/20020136061.pdf [firstpage_image] =>[orig_patent_app_number] => 10105546 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/105546
Method and memory system for writing in data Mar 24, 2002 Abandoned
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