Search

Son Luu Mai

Examiner (ID: 6998, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2511, 2827
Total Applications
3061
Issued Applications
2917
Pending Applications
43
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6107786 [patent_doc_number] => 20020171437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'Semiconductor memory device having noise tolerant input buffer' [patent_app_type] => new [patent_app_number] => 10/124854 [patent_app_country] => US [patent_app_date] => 2002-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3755 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20020171437.pdf [firstpage_image] =>[orig_patent_app_number] => 10124854 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/124854
Semiconductor memory device having noise tolerant input buffer Apr 17, 2002 Issued
Array ( [id] => 6268892 [patent_doc_number] => 20020104872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Method and apparatus for securing electronic circuits' [patent_app_type] => new [patent_app_number] => 10/120243 [patent_app_country] => US [patent_app_date] => 2002-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4265 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20020104872.pdf [firstpage_image] =>[orig_patent_app_number] => 10120243 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/120243
Method and apparatus for securing electronic circuits Apr 9, 2002 Abandoned
Array ( [id] => 7632121 [patent_doc_number] => 06665215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-16 [patent_title] => 'Memory cell read device with a precharge amplifier and associated methods' [patent_app_type] => B2 [patent_app_number] => 10/117448 [patent_app_country] => US [patent_app_date] => 2002-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2475 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/665/06665215.pdf [firstpage_image] =>[orig_patent_app_number] => 10117448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/117448
Memory cell read device with a precharge amplifier and associated methods Apr 4, 2002 Issued
Array ( [id] => 6435609 [patent_doc_number] => 20020176289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Method of erasing a FAMOS memory cell and a corresponding memory cell' [patent_app_type] => new [patent_app_number] => 10/117446 [patent_app_country] => US [patent_app_date] => 2002-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2698 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20020176289.pdf [firstpage_image] =>[orig_patent_app_number] => 10117446 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/117446
Method of erasing a FAMOS memory cell and a corresponding memory cell Apr 3, 2002 Issued
Array ( [id] => 1389795 [patent_doc_number] => 06563735 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'NOR-structured semiconductor memory device' [patent_app_type] => B1 [patent_app_number] => 10/117148 [patent_app_country] => US [patent_app_date] => 2002-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2905 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/563/06563735.pdf [firstpage_image] =>[orig_patent_app_number] => 10117148 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/117148
NOR-structured semiconductor memory device Apr 3, 2002 Issued
Array ( [id] => 6173028 [patent_doc_number] => 20020154538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Magnetic memory and driving method therefor' [patent_app_type] => new [patent_app_number] => 10/112748 [patent_app_country] => US [patent_app_date] => 2002-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7080 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20020154538.pdf [firstpage_image] =>[orig_patent_app_number] => 10112748 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/112748
Magnetic memory and driving method therefor Apr 1, 2002 Issued
Array ( [id] => 6534318 [patent_doc_number] => 20020110019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/114960 [patent_app_country] => US [patent_app_date] => 2002-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 23973 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20020110019.pdf [firstpage_image] =>[orig_patent_app_number] => 10114960 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/114960
Nonvolatile semiconductor memory device Apr 1, 2002 Issued
Array ( [id] => 6859934 [patent_doc_number] => 20030090942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/106046 [patent_app_country] => US [patent_app_date] => 2002-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8000 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20030090942.pdf [firstpage_image] =>[orig_patent_app_number] => 10106046 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/106046
Semiconductor device having a defect relief function of relieving a failure Mar 26, 2002 Issued
Array ( [id] => 1180215 [patent_doc_number] => 06751128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Semiconductor memory device having shortened testing time' [patent_app_type] => B2 [patent_app_number] => 10/106351 [patent_app_country] => US [patent_app_date] => 2002-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 42 [patent_no_of_words] => 31060 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751128.pdf [firstpage_image] =>[orig_patent_app_number] => 10106351 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/106351
Semiconductor memory device having shortened testing time Mar 26, 2002 Issued
Array ( [id] => 1303631 [patent_doc_number] => 06628538 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-30 [patent_title] => 'Memory module including module data wirings available as a memory access data bus' [patent_app_type] => B2 [patent_app_number] => 10/105249 [patent_app_country] => US [patent_app_date] => 2002-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 62 [patent_no_of_words] => 13582 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/628/06628538.pdf [firstpage_image] =>[orig_patent_app_number] => 10105249 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/105249
Memory module including module data wirings available as a memory access data bus Mar 25, 2002 Issued
Array ( [id] => 1292102 [patent_doc_number] => 06639862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-28 [patent_title] => 'Semiconductor memory with refresh and method for operating the semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 10/105547 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6729 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/639/06639862.pdf [firstpage_image] =>[orig_patent_app_number] => 10105547 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/105547
Semiconductor memory with refresh and method for operating the semiconductor memory Mar 24, 2002 Issued
Array ( [id] => 6520004 [patent_doc_number] => 20020136061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-26 [patent_title] => 'Method and memory system for writing in data' [patent_app_type] => new [patent_app_number] => 10/105546 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4562 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0136/20020136061.pdf [firstpage_image] =>[orig_patent_app_number] => 10105546 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/105546
Method and memory system for writing in data Mar 24, 2002 Abandoned
Array ( [id] => 1411606 [patent_doc_number] => 06532173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-11 [patent_title] => 'Nonvolatile semiconductor memory device with mechanism to prevent leak current' [patent_app_type] => B2 [patent_app_number] => 10/101846 [patent_app_country] => US [patent_app_date] => 2002-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4009 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/532/06532173.pdf [firstpage_image] =>[orig_patent_app_number] => 10101846 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/101846
Nonvolatile semiconductor memory device with mechanism to prevent leak current Mar 20, 2002 Issued
Array ( [id] => 1319216 [patent_doc_number] => 06614693 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'Combination erase waveform to reduce oxide trapping centers generation rate of flash EEPROM' [patent_app_type] => B1 [patent_app_number] => 10/100752 [patent_app_country] => US [patent_app_date] => 2002-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 11436 [patent_no_of_claims] => 72 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/614/06614693.pdf [firstpage_image] =>[orig_patent_app_number] => 10100752 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/100752
Combination erase waveform to reduce oxide trapping centers generation rate of flash EEPROM Mar 18, 2002 Issued
Array ( [id] => 1306226 [patent_doc_number] => 06625066 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Data path decoding technique for an embedded memory array' [patent_app_type] => B1 [patent_app_number] => 10/100151 [patent_app_country] => US [patent_app_date] => 2002-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3612 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625066.pdf [firstpage_image] =>[orig_patent_app_number] => 10100151 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/100151
Data path decoding technique for an embedded memory array Mar 17, 2002 Issued
Array ( [id] => 1288355 [patent_doc_number] => 06643205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-04 [patent_title] => 'Apparatus and method for refresh and data input device in SRAM having storage capacitor cell' [patent_app_type] => B2 [patent_app_number] => 10/093149 [patent_app_country] => US [patent_app_date] => 2002-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 4582 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643205.pdf [firstpage_image] =>[orig_patent_app_number] => 10093149 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/093149
Apparatus and method for refresh and data input device in SRAM having storage capacitor cell Mar 6, 2002 Issued
Array ( [id] => 1315115 [patent_doc_number] => 06618314 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Method and architecture for reducing the power consumption for memory devices in refresh operations' [patent_app_type] => B1 [patent_app_number] => 10/090850 [patent_app_country] => US [patent_app_date] => 2002-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4647 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/618/06618314.pdf [firstpage_image] =>[orig_patent_app_number] => 10090850 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/090850
Method and architecture for reducing the power consumption for memory devices in refresh operations Mar 3, 2002 Issued
Array ( [id] => 1358467 [patent_doc_number] => 06580644 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Flash memory device capable of checking memory cells for failure characteristics' [patent_app_type] => B1 [patent_app_number] => 10/091048 [patent_app_country] => US [patent_app_date] => 2002-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5125 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580644.pdf [firstpage_image] =>[orig_patent_app_number] => 10091048 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/091048
Flash memory device capable of checking memory cells for failure characteristics Mar 3, 2002 Issued
Array ( [id] => 1285236 [patent_doc_number] => 06646910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-11 [patent_title] => 'Magnetic memory using reverse magnetic field to improve half-select margin' [patent_app_type] => B2 [patent_app_number] => 10/090246 [patent_app_country] => US [patent_app_date] => 2002-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5827 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/646/06646910.pdf [firstpage_image] =>[orig_patent_app_number] => 10090246 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/090246
Magnetic memory using reverse magnetic field to improve half-select margin Mar 3, 2002 Issued
Array ( [id] => 1442571 [patent_doc_number] => 06496412 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Nonvolatile semiconductor memory device for storing multivalued data' [patent_app_type] => B1 [patent_app_number] => 10/084509 [patent_app_country] => US [patent_app_date] => 2002-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 13359 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496412.pdf [firstpage_image] =>[orig_patent_app_number] => 10084509 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/084509
Nonvolatile semiconductor memory device for storing multivalued data Feb 27, 2002 Issued
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