Search

Son Luu Mai

Examiner (ID: 18155)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1285236 [patent_doc_number] => 06646910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-11 [patent_title] => 'Magnetic memory using reverse magnetic field to improve half-select margin' [patent_app_type] => B2 [patent_app_number] => 10/090246 [patent_app_country] => US [patent_app_date] => 2002-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5827 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/646/06646910.pdf [firstpage_image] =>[orig_patent_app_number] => 10090246 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/090246
Magnetic memory using reverse magnetic field to improve half-select margin Mar 3, 2002 Issued
Array ( [id] => 1442571 [patent_doc_number] => 06496412 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Nonvolatile semiconductor memory device for storing multivalued data' [patent_app_type] => B1 [patent_app_number] => 10/084509 [patent_app_country] => US [patent_app_date] => 2002-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 13359 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496412.pdf [firstpage_image] =>[orig_patent_app_number] => 10084509 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/084509
Nonvolatile semiconductor memory device for storing multivalued data Feb 27, 2002 Issued
Array ( [id] => 1413402 [patent_doc_number] => 06542395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-01 [patent_title] => 'Integrated DRAM memory module' [patent_app_type] => B2 [patent_app_number] => 10/082553 [patent_app_country] => US [patent_app_date] => 2002-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2686 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/542/06542395.pdf [firstpage_image] =>[orig_patent_app_number] => 10082553 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/082553
Integrated DRAM memory module Feb 24, 2002 Issued
Array ( [id] => 1431695 [patent_doc_number] => 06504763 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Nonvolatile semiconductor memory capable of random programming' [patent_app_type] => B1 [patent_app_number] => 09/683845 [patent_app_country] => US [patent_app_date] => 2002-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2638 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/504/06504763.pdf [firstpage_image] =>[orig_patent_app_number] => 09683845 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/683845
Nonvolatile semiconductor memory capable of random programming Feb 20, 2002 Issued
Array ( [id] => 5857743 [patent_doc_number] => 20020122348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-05 [patent_title] => 'Data input circuit and method for synchronous semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/081546 [patent_app_country] => US [patent_app_date] => 2002-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7530 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20020122348.pdf [firstpage_image] =>[orig_patent_app_number] => 10081546 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/081546
Data input circuit and method for synchronous semiconductor memory device Feb 20, 2002 Issued
Array ( [id] => 1354084 [patent_doc_number] => 06587374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-01 [patent_title] => 'Serial storage device' [patent_app_type] => B2 [patent_app_number] => 10/082045 [patent_app_country] => US [patent_app_date] => 2002-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4927 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/587/06587374.pdf [firstpage_image] =>[orig_patent_app_number] => 10082045 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/082045
Serial storage device Feb 19, 2002 Issued
Array ( [id] => 1294119 [patent_doc_number] => 06633501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-14 [patent_title] => 'Integrated circuit and circuit configuration for supplying power to an integrated circuit' [patent_app_type] => B2 [patent_app_number] => 10/078149 [patent_app_country] => US [patent_app_date] => 2002-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2604 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/633/06633501.pdf [firstpage_image] =>[orig_patent_app_number] => 10078149 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/078149
Integrated circuit and circuit configuration for supplying power to an integrated circuit Feb 18, 2002 Issued
Array ( [id] => 6841947 [patent_doc_number] => 20030147294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'METHOD OF SCREENING NON-VOLATILE MEMORY DEVICES' [patent_app_type] => new [patent_app_number] => 10/066748 [patent_app_country] => US [patent_app_date] => 2002-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1368 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20030147294.pdf [firstpage_image] =>[orig_patent_app_number] => 10066748 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/066748
Method of screening non-volatile memory devices Feb 5, 2002 Issued
Array ( [id] => 6534430 [patent_doc_number] => 20020110029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Integrated circuit memory devices with per-bit redundancy and methods of operation thereof' [patent_app_type] => new [patent_app_number] => 10/068148 [patent_app_country] => US [patent_app_date] => 2002-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4273 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20020110029.pdf [firstpage_image] =>[orig_patent_app_number] => 10068148 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/068148
Integrated circuit memory devices with per-bit redundancy and methods of operation thereof Feb 5, 2002 Issued
Array ( [id] => 1426077 [patent_doc_number] => 06510073 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Two transistor ferroelectric non-volatile memory' [patent_app_type] => B1 [patent_app_number] => 10/062850 [patent_app_country] => US [patent_app_date] => 2002-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 1934 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510073.pdf [firstpage_image] =>[orig_patent_app_number] => 10062850 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/062850
Two transistor ferroelectric non-volatile memory Jan 30, 2002 Issued
Array ( [id] => 6773222 [patent_doc_number] => 20030016560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-23 [patent_title] => 'Semiconductor memory and method of driving semiconductor memory' [patent_app_type] => new [patent_app_number] => 10/059354 [patent_app_country] => US [patent_app_date] => 2002-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8125 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20030016560.pdf [firstpage_image] =>[orig_patent_app_number] => 10059354 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/059354
Semiconductor memory and method of driving semiconductor memory Jan 30, 2002 Abandoned
Array ( [id] => 6257182 [patent_doc_number] => 20020186590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-12 [patent_title] => 'Nonvolatile semiconductor memory device having hierarchical sector structure' [patent_app_type] => new [patent_app_number] => 10/058652 [patent_app_country] => US [patent_app_date] => 2002-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4467 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20020186590.pdf [firstpage_image] =>[orig_patent_app_number] => 10058652 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/058652
Nonvolatile semiconductor memory device having hierarchical sector structure Jan 27, 2002 Abandoned
Array ( [id] => 1402458 [patent_doc_number] => 06552957 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-22 [patent_title] => 'Semiconductor integrated circuit having a signal receiving circuit' [patent_app_type] => B2 [patent_app_number] => 10/050952 [patent_app_country] => US [patent_app_date] => 2002-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4649 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/552/06552957.pdf [firstpage_image] =>[orig_patent_app_number] => 10050952 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/050952
Semiconductor integrated circuit having a signal receiving circuit Jan 21, 2002 Issued
Array ( [id] => 1425111 [patent_doc_number] => 06512689 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-28 [patent_title] => 'MRAM without isolation devices' [patent_app_type] => B1 [patent_app_number] => 10/051646 [patent_app_country] => US [patent_app_date] => 2002-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6156 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/512/06512689.pdf [firstpage_image] =>[orig_patent_app_number] => 10051646 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/051646
MRAM without isolation devices Jan 17, 2002 Issued
Array ( [id] => 1372198 [patent_doc_number] => 06574134 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Non-volatile ferroelectric capacitor memory circuit having nondestructive read capability' [patent_app_type] => B1 [patent_app_number] => 10/050153 [patent_app_country] => US [patent_app_date] => 2002-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3789 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/574/06574134.pdf [firstpage_image] =>[orig_patent_app_number] => 10050153 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/050153
Non-volatile ferroelectric capacitor memory circuit having nondestructive read capability Jan 17, 2002 Issued
Array ( [id] => 1592847 [patent_doc_number] => 06483579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-19 [patent_title] => 'Clock synchronization semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/052191 [patent_app_country] => US [patent_app_date] => 2002-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 10349 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/483/06483579.pdf [firstpage_image] =>[orig_patent_app_number] => 10052191 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/052191
Clock synchronization semiconductor memory device Jan 16, 2002 Issued
Array ( [id] => 1429332 [patent_doc_number] => 06515903 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-04 [patent_title] => 'Negative pump regulator using MOS capacitor' [patent_app_type] => B1 [patent_app_number] => 10/050254 [patent_app_country] => US [patent_app_date] => 2002-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 10400 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/515/06515903.pdf [firstpage_image] =>[orig_patent_app_number] => 10050254 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/050254
Negative pump regulator using MOS capacitor Jan 15, 2002 Issued
Array ( [id] => 1411644 [patent_doc_number] => 06532175 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-11 [patent_title] => 'Method and apparatus for soft program verification in a memory device' [patent_app_type] => B1 [patent_app_number] => 10/050650 [patent_app_country] => US [patent_app_date] => 2002-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6870 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/532/06532175.pdf [firstpage_image] =>[orig_patent_app_number] => 10050650 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/050650
Method and apparatus for soft program verification in a memory device Jan 15, 2002 Issued
Array ( [id] => 1572699 [patent_doc_number] => 06498758 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-24 [patent_title] => 'Twisted bitlines to reduce coupling effects (dual port memories)' [patent_app_type] => B1 [patent_app_number] => 10/047547 [patent_app_country] => US [patent_app_date] => 2002-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3610 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/498/06498758.pdf [firstpage_image] =>[orig_patent_app_number] => 10047547 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/047547
Twisted bitlines to reduce coupling effects (dual port memories) Jan 15, 2002 Issued
Array ( [id] => 5857742 [patent_doc_number] => 20020122347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-05 [patent_title] => 'Synchronous-reading nonvolatile memory' [patent_app_type] => new [patent_app_number] => 10/047448 [patent_app_country] => US [patent_app_date] => 2002-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3532 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20020122347.pdf [firstpage_image] =>[orig_patent_app_number] => 10047448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/047448
Synchronous-reading nonvolatile memory Jan 13, 2002 Abandoned
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