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Son Luu Mai

Examiner (ID: 18155)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7644619 [patent_doc_number] => 06473354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-29 [patent_title] => 'Semiconductor integrated circuit device and method of activating the same' [patent_app_type] => B2 [patent_app_number] => 10/040492 [patent_app_country] => US [patent_app_date] => 2002-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 20505 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/473/06473354.pdf [firstpage_image] =>[orig_patent_app_number] => 10040492 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/040492
Semiconductor integrated circuit device and method of activating the same Jan 8, 2002 Issued
Array ( [id] => 5934673 [patent_doc_number] => 20020060944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-23 [patent_title] => 'Semiconductor integrated circuit device and method of activating the same' [patent_app_type] => new [patent_app_number] => 10/040452 [patent_app_country] => US [patent_app_date] => 2002-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 20644 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20020060944.pdf [firstpage_image] =>[orig_patent_app_number] => 10040452 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/040452
Semiconductor integrated circuit device and method of activating the same Jan 8, 2002 Issued
Array ( [id] => 1585440 [patent_doc_number] => 06424586 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Semiconductor integrated circuit device and method of activating same' [patent_app_type] => B1 [patent_app_number] => 10/040435 [patent_app_country] => US [patent_app_date] => 2002-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 20507 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/424/06424586.pdf [firstpage_image] =>[orig_patent_app_number] => 10040435 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/040435
Semiconductor integrated circuit device and method of activating same Jan 8, 2002 Issued
Array ( [id] => 1603864 [patent_doc_number] => 06434047 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Semiconductor memory system' [patent_app_type] => B1 [patent_app_number] => 10/038898 [patent_app_country] => US [patent_app_date] => 2002-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 13014 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/434/06434047.pdf [firstpage_image] =>[orig_patent_app_number] => 10038898 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038898
Semiconductor memory system Jan 7, 2002 Issued
Array ( [id] => 6759916 [patent_doc_number] => 20030123277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Method and apparatus to program a phase change memory' [patent_app_type] => new [patent_app_number] => 10/034146 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5966 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20030123277.pdf [firstpage_image] =>[orig_patent_app_number] => 10034146 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/034146
Method and apparatus to program a phase change memory Dec 27, 2001 Issued
Array ( [id] => 6078410 [patent_doc_number] => 20020080664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/024250 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13602 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20020080664.pdf [firstpage_image] =>[orig_patent_app_number] => 10024250 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/024250
Semiconductor device Dec 20, 2001 Issued
Array ( [id] => 1418863 [patent_doc_number] => 06535429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-18 [patent_title] => 'Reading circuit for a memory cell' [patent_app_type] => B2 [patent_app_number] => 10/028747 [patent_app_country] => US [patent_app_date] => 2001-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3932 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535429.pdf [firstpage_image] =>[orig_patent_app_number] => 10028747 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/028747
Reading circuit for a memory cell Dec 19, 2001 Issued
Array ( [id] => 1350815 [patent_doc_number] => RE038109 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2003-05-06 [patent_title] => 'Block write circuit and method for wide data path memory device' [patent_app_type] => E1 [patent_app_number] => 10/029572 [patent_app_country] => US [patent_app_date] => 2001-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8489 [patent_no_of_claims] => 76 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/038/RE038109.pdf [firstpage_image] =>[orig_patent_app_number] => 10029572 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/029572
Block write circuit and method for wide data path memory device Dec 19, 2001 Issued
Array ( [id] => 1368083 [patent_doc_number] => 06577528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-10 [patent_title] => 'Circuit configuration for controlling write and read operations in a magnetoresistive memory configuration' [patent_app_type] => B2 [patent_app_number] => 10/023155 [patent_app_country] => US [patent_app_date] => 2001-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3883 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/577/06577528.pdf [firstpage_image] =>[orig_patent_app_number] => 10023155 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/023155
Circuit configuration for controlling write and read operations in a magnetoresistive memory configuration Dec 16, 2001 Issued
Array ( [id] => 1425404 [patent_doc_number] => 06512718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-28 [patent_title] => 'Circuit for controlling wordline in SRAM' [patent_app_type] => B2 [patent_app_number] => 10/013353 [patent_app_country] => US [patent_app_date] => 2001-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3137 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/512/06512718.pdf [firstpage_image] =>[orig_patent_app_number] => 10013353 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/013353
Circuit for controlling wordline in SRAM Dec 12, 2001 Issued
Array ( [id] => 5919832 [patent_doc_number] => 20020114192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Nonvolatile memory and method of programming the same memory' [patent_app_type] => new [patent_app_number] => 10/012549 [patent_app_country] => US [patent_app_date] => 2001-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14400 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20020114192.pdf [firstpage_image] =>[orig_patent_app_number] => 10012549 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/012549
Nonvolatile memory and method of programming the same memory Dec 11, 2001 Issued
Array ( [id] => 1520401 [patent_doc_number] => 06501669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-31 [patent_title] => 'Die architecture accommodating high-speed semiconductor devices' [patent_app_type] => B2 [patent_app_number] => 10/017517 [patent_app_country] => US [patent_app_date] => 2001-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3419 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/501/06501669.pdf [firstpage_image] =>[orig_patent_app_number] => 10017517 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/017517
Die architecture accommodating high-speed semiconductor devices Dec 10, 2001 Issued
Array ( [id] => 6211731 [patent_doc_number] => 20020073392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Die architecture accommodating high-speed semiconductor devices' [patent_app_type] => new [patent_app_number] => 10/017515 [patent_app_country] => US [patent_app_date] => 2001-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3548 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20020073392.pdf [firstpage_image] =>[orig_patent_app_number] => 10017515 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/017515
Die architecture accommodating high-speed semiconductor devices Dec 10, 2001 Issued
Array ( [id] => 1427727 [patent_doc_number] => 06519175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-11 [patent_title] => 'Ferroelectric memory device' [patent_app_type] => B2 [patent_app_number] => 10/006154 [patent_app_country] => US [patent_app_date] => 2001-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11914 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/519/06519175.pdf [firstpage_image] =>[orig_patent_app_number] => 10006154 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/006154
Ferroelectric memory device Dec 9, 2001 Issued
Array ( [id] => 1572634 [patent_doc_number] => 06498740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-24 [patent_title] => 'Die architecture accommodating high-speed semiconductor devices' [patent_app_type] => B2 [patent_app_number] => 10/005087 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3401 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/498/06498740.pdf [firstpage_image] =>[orig_patent_app_number] => 10005087 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/005087
Die architecture accommodating high-speed semiconductor devices Dec 3, 2001 Issued
Array ( [id] => 5827163 [patent_doc_number] => 20020067633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => new [patent_app_number] => 10/007148 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 6786 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20020067633.pdf [firstpage_image] =>[orig_patent_app_number] => 10007148 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/007148
Semiconductor integrated circuit having a built-in data storage circuit for nonvolatile storage of control data Dec 3, 2001 Issued
Array ( [id] => 1603868 [patent_doc_number] => 06434051 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Non-volatile memory circuit' [patent_app_type] => B1 [patent_app_number] => 09/926648 [patent_app_country] => US [patent_app_date] => 2001-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 6920 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/434/06434051.pdf [firstpage_image] =>[orig_patent_app_number] => 09926648 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/926648
Non-volatile memory circuit Nov 27, 2001 Issued
Array ( [id] => 6046116 [patent_doc_number] => 20020167859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-14 [patent_title] => 'Precharge control signal generator, and semiconductor memory device using the same' [patent_app_type] => new [patent_app_number] => 09/994652 [patent_app_country] => US [patent_app_date] => 2001-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7071 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20020167859.pdf [firstpage_image] =>[orig_patent_app_number] => 09994652 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/994652
Precharge control signal generator, and semiconductor memory device using the same Nov 27, 2001 Issued
Array ( [id] => 1423785 [patent_doc_number] => 06529431 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'Rapid equalizing ground line and sense circuit' [patent_app_type] => B1 [patent_app_number] => 09/997354 [patent_app_country] => US [patent_app_date] => 2001-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3922 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/529/06529431.pdf [firstpage_image] =>[orig_patent_app_number] => 09997354 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/997354
Rapid equalizing ground line and sense circuit Nov 26, 2001 Issued
Array ( [id] => 6155662 [patent_doc_number] => 20020145902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Magnetic memory device and magnetic substrate' [patent_app_type] => new [patent_app_number] => 09/989155 [patent_app_country] => US [patent_app_date] => 2001-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 52 [patent_no_of_words] => 31667 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20020145902.pdf [firstpage_image] =>[orig_patent_app_number] => 09989155 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/989155
Magnetic memory device and magnetic substrate Nov 20, 2001 Issued
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