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Son Luu Mai

Examiner (ID: 18155)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1208649 [patent_doc_number] => 06717856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Method and apparatus for sen-ref equalization' [patent_app_type] => B2 [patent_app_number] => 09/896446 [patent_app_country] => US [patent_app_date] => 2001-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3798 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717856.pdf [firstpage_image] =>[orig_patent_app_number] => 09896446 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/896446
Method and apparatus for sen-ref equalization Jun 29, 2001 Issued
Array ( [id] => 1295740 [patent_doc_number] => 06631085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-07 [patent_title] => 'Three-dimensional memory array incorporating serial chain diode stack' [patent_app_type] => B2 [patent_app_number] => 09/897705 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 11776 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/631/06631085.pdf [firstpage_image] =>[orig_patent_app_number] => 09897705 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/897705
Three-dimensional memory array incorporating serial chain diode stack Jun 28, 2001 Issued
Array ( [id] => 1555156 [patent_doc_number] => 06400629 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'System and method for early write to memory by holding bitline at fixed potential' [patent_app_type] => B1 [patent_app_number] => 09/896746 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4605 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/400/06400629.pdf [firstpage_image] =>[orig_patent_app_number] => 09896746 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/896746
System and method for early write to memory by holding bitline at fixed potential Jun 28, 2001 Issued
Array ( [id] => 1504320 [patent_doc_number] => 06487113 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-26 [patent_title] => 'Programming a phase-change memory with slow quench time' [patent_app_type] => B1 [patent_app_number] => 09/895054 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3461 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487113.pdf [firstpage_image] =>[orig_patent_app_number] => 09895054 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/895054
Programming a phase-change memory with slow quench time Jun 28, 2001 Issued
Array ( [id] => 1108179 [patent_doc_number] => 06813196 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'High speed interface type semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 09/892549 [patent_app_country] => US [patent_app_date] => 2001-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2467 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 432 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/813/06813196.pdf [firstpage_image] =>[orig_patent_app_number] => 09892549 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/892549
High speed interface type semiconductor memory device Jun 27, 2001 Issued
Array ( [id] => 1517707 [patent_doc_number] => 06421292 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Semiconductor memory, and memory access method' [patent_app_type] => B1 [patent_app_number] => 09/892748 [patent_app_country] => US [patent_app_date] => 2001-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 27 [patent_no_of_words] => 13188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/421/06421292.pdf [firstpage_image] =>[orig_patent_app_number] => 09892748 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/892748
Semiconductor memory, and memory access method Jun 27, 2001 Issued
Array ( [id] => 1342113 [patent_doc_number] => 06597614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-22 [patent_title] => 'Self refresh circuit for semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 09/892550 [patent_app_country] => US [patent_app_date] => 2001-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2670 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/597/06597614.pdf [firstpage_image] =>[orig_patent_app_number] => 09892550 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/892550
Self refresh circuit for semiconductor memory device Jun 27, 2001 Issued
Array ( [id] => 6754546 [patent_doc_number] => 20030002322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'CURRENT LEAKAGE REDUCTION FOR LOADED BIT-LINES IN ON-CHIP MEMORY STRUCTURES' [patent_app_type] => new [patent_app_number] => 09/896348 [patent_app_country] => US [patent_app_date] => 2001-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1938 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20030002322.pdf [firstpage_image] =>[orig_patent_app_number] => 09896348 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/896348
Current leakage reduction for loaded bit-lines in on-chip memory structures Jun 27, 2001 Issued
Array ( [id] => 1603851 [patent_doc_number] => 06434034 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems' [patent_app_type] => B1 [patent_app_number] => 09/888167 [patent_app_country] => US [patent_app_date] => 2001-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 6765 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/434/06434034.pdf [firstpage_image] =>[orig_patent_app_number] => 09888167 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/888167
Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems Jun 21, 2001 Issued
Array ( [id] => 1431689 [patent_doc_number] => 06504760 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Charging a capacitance of a memory cell and charger' [patent_app_type] => B1 [patent_app_number] => 09/888252 [patent_app_country] => US [patent_app_date] => 2001-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 7194 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/504/06504760.pdf [firstpage_image] =>[orig_patent_app_number] => 09888252 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/888252
Charging a capacitance of a memory cell and charger Jun 21, 2001 Issued
Array ( [id] => 1470001 [patent_doc_number] => 06459620 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'Sense amplifier offset cancellation in non-volatile memory circuits by dedicated programmed reference non-volatile memory cells' [patent_app_type] => B1 [patent_app_number] => 09/888348 [patent_app_country] => US [patent_app_date] => 2001-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4113 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/459/06459620.pdf [firstpage_image] =>[orig_patent_app_number] => 09888348 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/888348
Sense amplifier offset cancellation in non-volatile memory circuits by dedicated programmed reference non-volatile memory cells Jun 20, 2001 Issued
Array ( [id] => 7091825 [patent_doc_number] => 20010033520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-25 [patent_title] => 'Device and method for repairing a memory array by storing each bit in multiple memory cells in the array' [patent_app_type] => new [patent_app_number] => 09/886762 [patent_app_country] => US [patent_app_date] => 2001-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8230 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20010033520.pdf [firstpage_image] =>[orig_patent_app_number] => 09886762 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/886762
Device and method for repairing a memory array by storing each bit in multiple memory cells in the array Jun 20, 2001 Issued
Array ( [id] => 1511306 [patent_doc_number] => 06442057 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Memory module for preventing skew between bus lines' [patent_app_type] => B1 [patent_app_number] => 09/886552 [patent_app_country] => US [patent_app_date] => 2001-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1643 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442057.pdf [firstpage_image] =>[orig_patent_app_number] => 09886552 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/886552
Memory module for preventing skew between bus lines Jun 20, 2001 Issued
Array ( [id] => 1511331 [patent_doc_number] => 06442063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-08-27 [patent_title] => 'Integrated memory having memory cells with magnetoresistive memory effect' [patent_app_type] => B2 [patent_app_number] => 09/885554 [patent_app_country] => US [patent_app_date] => 2001-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2560 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442063.pdf [firstpage_image] =>[orig_patent_app_number] => 09885554 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/885554
Integrated memory having memory cells with magnetoresistive memory effect Jun 19, 2001 Issued
Array ( [id] => 6058280 [patent_doc_number] => 20020029462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-14 [patent_title] => 'Magnetoresistive trimming of GMR circuits' [patent_app_type] => new [patent_app_number] => 09/883645 [patent_app_country] => US [patent_app_date] => 2001-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6736 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20020029462.pdf [firstpage_image] =>[orig_patent_app_number] => 09883645 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/883645
Magnetoresistive trimming of GMR circuits Jun 17, 2001 Issued
Array ( [id] => 6488740 [patent_doc_number] => 20020024838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-28 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE USING FERROELECTRIC FILM' [patent_app_type] => new [patent_app_number] => 09/879054 [patent_app_country] => US [patent_app_date] => 2001-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20020024838.pdf [firstpage_image] =>[orig_patent_app_number] => 09879054 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/879054
Semiconductor memory device using ferroelectric film Jun 12, 2001 Issued
Array ( [id] => 1523349 [patent_doc_number] => 06414881 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Semiconductor device capable of generating internal voltage effectively' [patent_app_type] => B1 [patent_app_number] => 09/876078 [patent_app_country] => US [patent_app_date] => 2001-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 13658 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/414/06414881.pdf [firstpage_image] =>[orig_patent_app_number] => 09876078 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/876078
Semiconductor device capable of generating internal voltage effectively Jun 7, 2001 Issued
Array ( [id] => 6895705 [patent_doc_number] => 20010026495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Semiconductor integrated circuit device and method of activating the same' [patent_app_type] => new [patent_app_number] => 09/875169 [patent_app_country] => US [patent_app_date] => 2001-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 20651 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026495.pdf [firstpage_image] =>[orig_patent_app_number] => 09875169 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/875169
Semiconductor integrated circuit device and method of activating the same Jun 6, 2001 Issued
Array ( [id] => 1430684 [patent_doc_number] => 06526541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-25 [patent_title] => 'Library for use in designing a semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/873708 [patent_app_country] => US [patent_app_date] => 2001-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 25 [patent_no_of_words] => 6128 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/526/06526541.pdf [firstpage_image] =>[orig_patent_app_number] => 09873708 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/873708
Library for use in designing a semiconductor device Jun 3, 2001 Issued
Array ( [id] => 1482970 [patent_doc_number] => 06452860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-09-17 [patent_title] => 'Semiconductor memory device having segment type word line structure' [patent_app_type] => B2 [patent_app_number] => 09/871646 [patent_app_country] => US [patent_app_date] => 2001-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4247 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452860.pdf [firstpage_image] =>[orig_patent_app_number] => 09871646 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/871646
Semiconductor memory device having segment type word line structure Jun 3, 2001 Issued
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