Search

Son Luu Mai

Examiner (ID: 18155, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7635481 [patent_doc_number] => 06381181 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'Timing independent current comparison and self-latching data circuit' [patent_app_type] => B1 [patent_app_number] => 09/718650 [patent_app_country] => US [patent_app_date] => 2000-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3412 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/381/06381181.pdf [firstpage_image] =>[orig_patent_app_number] => 09718650 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/718650
Timing independent current comparison and self-latching data circuit Nov 20, 2000 Issued
Array ( [id] => 4393111 [patent_doc_number] => 06304482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Apparatus of reducing power consumption of single-ended SRAM' [patent_app_type] => 1 [patent_app_number] => 9/716247 [patent_app_country] => US [patent_app_date] => 2000-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2068 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304482.pdf [firstpage_image] =>[orig_patent_app_number] => 716247 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/716247
Apparatus of reducing power consumption of single-ended SRAM Nov 20, 2000 Issued
Array ( [id] => 1590025 [patent_doc_number] => 06359826 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Method and a system for controlling a data sense amplifier for a memory chip' [patent_app_type] => B1 [patent_app_number] => 09/718052 [patent_app_country] => US [patent_app_date] => 2000-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2874 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359826.pdf [firstpage_image] =>[orig_patent_app_number] => 09718052 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/718052
Method and a system for controlling a data sense amplifier for a memory chip Nov 19, 2000 Issued
Array ( [id] => 1555946 [patent_doc_number] => 06349059 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-19 [patent_title] => 'Method for reading data from a non-volatile memory device with autodetect burst mode reading and corresponding reading circuit' [patent_app_type] => B1 [patent_app_number] => 09/716746 [patent_app_country] => US [patent_app_date] => 2000-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3492 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/349/06349059.pdf [firstpage_image] =>[orig_patent_app_number] => 09716746 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/716746
Method for reading data from a non-volatile memory device with autodetect burst mode reading and corresponding reading circuit Nov 19, 2000 Issued
Array ( [id] => 4341939 [patent_doc_number] => 06320796 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Variable slope charge pump control' [patent_app_type] => 1 [patent_app_number] => 9/710255 [patent_app_country] => US [patent_app_date] => 2000-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2625 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/320/06320796.pdf [firstpage_image] =>[orig_patent_app_number] => 710255 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/710255
Variable slope charge pump control Nov 9, 2000 Issued
Array ( [id] => 4418396 [patent_doc_number] => 06310794 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Upgradable storage system' [patent_app_type] => 1 [patent_app_number] => 9/709048 [patent_app_country] => US [patent_app_date] => 2000-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4011 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/310/06310794.pdf [firstpage_image] =>[orig_patent_app_number] => 709048 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/709048
Upgradable storage system Nov 8, 2000 Issued
Array ( [id] => 1599641 [patent_doc_number] => 06385082 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Thermally-assisted magnetic random access memory (MRAM)' [patent_app_type] => B1 [patent_app_number] => 09/708253 [patent_app_country] => US [patent_app_date] => 2000-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3630 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/385/06385082.pdf [firstpage_image] =>[orig_patent_app_number] => 09708253 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/708253
Thermally-assisted magnetic random access memory (MRAM) Nov 7, 2000 Issued
Array ( [id] => 4326343 [patent_doc_number] => 06317369 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Semiconductor device allowing higher speed data transmission to and from external unit' [patent_app_type] => 1 [patent_app_number] => 9/704048 [patent_app_country] => US [patent_app_date] => 2000-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 33 [patent_no_of_words] => 10505 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/317/06317369.pdf [firstpage_image] =>[orig_patent_app_number] => 704048 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/704048
Semiconductor device allowing higher speed data transmission to and from external unit Nov 1, 2000 Issued
Array ( [id] => 1511428 [patent_doc_number] => 06442093 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Cascode barrel read' [patent_app_type] => B1 [patent_app_number] => 09/696054 [patent_app_country] => US [patent_app_date] => 2000-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4141 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442093.pdf [firstpage_image] =>[orig_patent_app_number] => 09696054 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/696054
Cascode barrel read Oct 24, 2000 Issued
Array ( [id] => 4418966 [patent_doc_number] => 06301140 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Content addressable memory cell with a bootstrap improved compare' [patent_app_type] => 1 [patent_app_number] => 9/697746 [patent_app_country] => US [patent_app_date] => 2000-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1541 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/301/06301140.pdf [firstpage_image] =>[orig_patent_app_number] => 697746 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/697746
Content addressable memory cell with a bootstrap improved compare Oct 24, 2000 Issued
Array ( [id] => 4367286 [patent_doc_number] => 06292425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Power saving on the fly during reading of data from a memory device' [patent_app_type] => 1 [patent_app_number] => 9/696652 [patent_app_country] => US [patent_app_date] => 2000-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5402 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292425.pdf [firstpage_image] =>[orig_patent_app_number] => 696652 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/696652
Power saving on the fly during reading of data from a memory device Oct 24, 2000 Issued
Array ( [id] => 4418833 [patent_doc_number] => 06240027 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Approach to provide high external voltage for flash memory erase' [patent_app_type] => 1 [patent_app_number] => 9/693503 [patent_app_country] => US [patent_app_date] => 2000-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3062 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240027.pdf [firstpage_image] =>[orig_patent_app_number] => 693503 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/693503
Approach to provide high external voltage for flash memory erase Oct 22, 2000 Issued
Array ( [id] => 4416800 [patent_doc_number] => 06233175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Self-limiting multi-level programming states' [patent_app_type] => 1 [patent_app_number] => 9/693650 [patent_app_country] => US [patent_app_date] => 2000-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5143 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/233/06233175.pdf [firstpage_image] =>[orig_patent_app_number] => 693650 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/693650
Self-limiting multi-level programming states Oct 20, 2000 Issued
Array ( [id] => 4346115 [patent_doc_number] => 06333868 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-25 [patent_title] => 'Semiconductor memory device having selectively shielded data lines' [patent_app_type] => 1 [patent_app_number] => 9/691048 [patent_app_country] => US [patent_app_date] => 2000-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4758 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/333/06333868.pdf [firstpage_image] =>[orig_patent_app_number] => 691048 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/691048
Semiconductor memory device having selectively shielded data lines Oct 18, 2000 Issued
Array ( [id] => 1410222 [patent_doc_number] => 06545908 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-08 [patent_title] => 'Dual conductor inductive sensor for a non-volatile random access ferromagnetic memory' [patent_app_type] => B1 [patent_app_number] => 09/691313 [patent_app_country] => US [patent_app_date] => 2000-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2371 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/545/06545908.pdf [firstpage_image] =>[orig_patent_app_number] => 09691313 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/691313
Dual conductor inductive sensor for a non-volatile random access ferromagnetic memory Oct 17, 2000 Issued
Array ( [id] => 1552251 [patent_doc_number] => 06347052 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Word line decoding architecture in a flash memory' [patent_app_type] => B1 [patent_app_number] => 09/690554 [patent_app_country] => US [patent_app_date] => 2000-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6800 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/347/06347052.pdf [firstpage_image] =>[orig_patent_app_number] => 09690554 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/690554
Word line decoding architecture in a flash memory Oct 16, 2000 Issued
Array ( [id] => 1429781 [patent_doc_number] => 06504398 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure' [patent_app_type] => B1 [patent_app_number] => 09/688454 [patent_app_country] => US [patent_app_date] => 2000-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 8736 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/504/06504398.pdf [firstpage_image] =>[orig_patent_app_number] => 09688454 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/688454
Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure Oct 15, 2000 Issued
Array ( [id] => 4298591 [patent_doc_number] => 06269035 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Circuit and method for a multiplexed redundancy scheme in a memory device' [patent_app_type] => 1 [patent_app_number] => 9/687206 [patent_app_country] => US [patent_app_date] => 2000-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4320 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/269/06269035.pdf [firstpage_image] =>[orig_patent_app_number] => 687206 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/687206
Circuit and method for a multiplexed redundancy scheme in a memory device Oct 12, 2000 Issued
Array ( [id] => 4367310 [patent_doc_number] => 06292427 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Hierarchical sense amp and write driver circuitry for compilable memory' [patent_app_type] => 1 [patent_app_number] => 9/689352 [patent_app_country] => US [patent_app_date] => 2000-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5471 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292427.pdf [firstpage_image] =>[orig_patent_app_number] => 689352 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/689352
Hierarchical sense amp and write driver circuitry for compilable memory Oct 11, 2000 Issued
Array ( [id] => 1603854 [patent_doc_number] => 06434037 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'MUX-based ROM using n-bit subfunction encoding' [patent_app_type] => B1 [patent_app_number] => 09/686655 [patent_app_country] => US [patent_app_date] => 2000-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2239 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/434/06434037.pdf [firstpage_image] =>[orig_patent_app_number] => 09686655 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/686655
MUX-based ROM using n-bit subfunction encoding Oct 9, 2000 Issued
Menu