Search

Son Luu Mai

Examiner (ID: 18155, Phone: (571)272-1786 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818
Total Applications
3063
Issued Applications
2917
Pending Applications
45
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4318091 [patent_doc_number] => 06327205 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Signal latching of high bandwidth DRAM arrays when skew between different components is higher than signal rate' [patent_app_type] => 1 [patent_app_number] => 9/578354 [patent_app_country] => US [patent_app_date] => 2000-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 4481 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/327/06327205.pdf [firstpage_image] =>[orig_patent_app_number] => 578354 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/578354
Signal latching of high bandwidth DRAM arrays when skew between different components is higher than signal rate May 23, 2000 Issued
Array ( [id] => 4284747 [patent_doc_number] => 06246607 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Methods of programming nonvolatile memory cells by floating drain or source regions associated therewith' [patent_app_type] => 1 [patent_app_number] => 9/576977 [patent_app_country] => US [patent_app_date] => 2000-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 31 [patent_no_of_words] => 9621 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/246/06246607.pdf [firstpage_image] =>[orig_patent_app_number] => 576977 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/576977
Methods of programming nonvolatile memory cells by floating drain or source regions associated therewith May 22, 2000 Issued
Array ( [id] => 4291055 [patent_doc_number] => 06282128 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Integrated circuit memory devices having multiple data rate mode capability and methods of operating same' [patent_app_type] => 1 [patent_app_number] => 9/576987 [patent_app_country] => US [patent_app_date] => 2000-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 5679 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/282/06282128.pdf [firstpage_image] =>[orig_patent_app_number] => 576987 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/576987
Integrated circuit memory devices having multiple data rate mode capability and methods of operating same May 22, 2000 Issued
Array ( [id] => 4339036 [patent_doc_number] => 06330177 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'CAM/RAM memory device with a scalable structure' [patent_app_type] => 1 [patent_app_number] => 9/574354 [patent_app_country] => US [patent_app_date] => 2000-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2292 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/330/06330177.pdf [firstpage_image] =>[orig_patent_app_number] => 574354 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/574354
CAM/RAM memory device with a scalable structure May 18, 2000 Issued
Array ( [id] => 1525661 [patent_doc_number] => 06353573 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Clock synchronization semiconductor memory device' [patent_app_type] => B1 [patent_app_number] => 09/568348 [patent_app_country] => US [patent_app_date] => 2000-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 10294 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353573.pdf [firstpage_image] =>[orig_patent_app_number] => 09568348 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/568348
Clock synchronization semiconductor memory device May 9, 2000 Issued
Array ( [id] => 4309418 [patent_doc_number] => 06198683 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-06 [patent_title] => 'Memory device' [patent_app_type] => 1 [patent_app_number] => 9/563846 [patent_app_country] => US [patent_app_date] => 2000-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6210 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/198/06198683.pdf [firstpage_image] =>[orig_patent_app_number] => 563846 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/563846
Memory device May 3, 2000 Issued
Array ( [id] => 1570388 [patent_doc_number] => 06377502 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Semiconductor device that enables simultaneous read and write/erase operation' [patent_app_type] => B1 [patent_app_number] => 09/563348 [patent_app_country] => US [patent_app_date] => 2000-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 61 [patent_no_of_words] => 20569 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/377/06377502.pdf [firstpage_image] =>[orig_patent_app_number] => 09563348 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/563348
Semiconductor device that enables simultaneous read and write/erase operation May 2, 2000 Issued
Array ( [id] => 4416290 [patent_doc_number] => 06272046 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Individual source line to decrease column leakage' [patent_app_type] => 1 [patent_app_number] => 9/562748 [patent_app_country] => US [patent_app_date] => 2000-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3666 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/272/06272046.pdf [firstpage_image] =>[orig_patent_app_number] => 562748 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/562748
Individual source line to decrease column leakage May 1, 2000 Issued
Array ( [id] => 1589988 [patent_doc_number] => 06359816 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Response time measurement' [patent_app_type] => B1 [patent_app_number] => 09/563449 [patent_app_country] => US [patent_app_date] => 2000-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3586 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359816.pdf [firstpage_image] =>[orig_patent_app_number] => 09563449 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/563449
Response time measurement Apr 30, 2000 Issued
Array ( [id] => 4339067 [patent_doc_number] => 06330178 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Ferroelectric memory device' [patent_app_type] => 1 [patent_app_number] => 9/558104 [patent_app_country] => US [patent_app_date] => 2000-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 38 [patent_no_of_words] => 13690 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/330/06330178.pdf [firstpage_image] =>[orig_patent_app_number] => 558104 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/558104
Ferroelectric memory device Apr 24, 2000 Issued
Array ( [id] => 4417504 [patent_doc_number] => 06172916 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Semiconductor memory device having a large band width and allowing efficient execution of redundant repair' [patent_app_type] => 1 [patent_app_number] => 9/551839 [patent_app_country] => US [patent_app_date] => 2000-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 27 [patent_no_of_words] => 16831 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172916.pdf [firstpage_image] =>[orig_patent_app_number] => 551839 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/551839
Semiconductor memory device having a large band width and allowing efficient execution of redundant repair Apr 17, 2000 Issued
Array ( [id] => 4373719 [patent_doc_number] => 06256217 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Apparatus for on-board programming of serial EEPROMS' [patent_app_type] => 1 [patent_app_number] => 9/549132 [patent_app_country] => US [patent_app_date] => 2000-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2777 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256217.pdf [firstpage_image] =>[orig_patent_app_number] => 549132 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/549132
Apparatus for on-board programming of serial EEPROMS Apr 12, 2000 Issued
Array ( [id] => 4425575 [patent_doc_number] => 06178127 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Semiconductor memory device allowing reliable repairing of a defective column' [patent_app_type] => 1 [patent_app_number] => 9/546648 [patent_app_country] => US [patent_app_date] => 2000-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 14357 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/178/06178127.pdf [firstpage_image] =>[orig_patent_app_number] => 546648 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/546648
Semiconductor memory device allowing reliable repairing of a defective column Apr 9, 2000 Issued
Array ( [id] => 4304978 [patent_doc_number] => 06236588 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Nonvolatile ferroelectric random access memory device and a method of reading data thereof' [patent_app_type] => 1 [patent_app_number] => 9/546552 [patent_app_country] => US [patent_app_date] => 2000-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6395 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/236/06236588.pdf [firstpage_image] =>[orig_patent_app_number] => 546552 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/546552
Nonvolatile ferroelectric random access memory device and a method of reading data thereof Apr 9, 2000 Issued
Array ( [id] => 4396666 [patent_doc_number] => 06262919 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Pin to pin laser signature circuit' [patent_app_type] => 1 [patent_app_number] => 9/544248 [patent_app_country] => US [patent_app_date] => 2000-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2388 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/262/06262919.pdf [firstpage_image] =>[orig_patent_app_number] => 544248 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/544248
Pin to pin laser signature circuit Apr 4, 2000 Issued
Array ( [id] => 4417616 [patent_doc_number] => 06172927 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'First-in, first-out integrated circuit memory device incorporating a retransmit function' [patent_app_type] => 1 [patent_app_number] => 9/536072 [patent_app_country] => US [patent_app_date] => 2000-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11581 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172927.pdf [firstpage_image] =>[orig_patent_app_number] => 536072 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/536072
First-in, first-out integrated circuit memory device incorporating a retransmit function Mar 23, 2000 Issued
Array ( [id] => 4419978 [patent_doc_number] => 06229734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Nonvolatile semiconductor storage device having controlled cell threshold voltage distribution' [patent_app_type] => 1 [patent_app_number] => 9/531548 [patent_app_country] => US [patent_app_date] => 2000-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 6490 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/229/06229734.pdf [firstpage_image] =>[orig_patent_app_number] => 531548 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/531548
Nonvolatile semiconductor storage device having controlled cell threshold voltage distribution Mar 19, 2000 Issued
Array ( [id] => 4202306 [patent_doc_number] => 06154401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Circuit and method for memory device with defect current isolation' [patent_app_type] => 1 [patent_app_number] => 9/528400 [patent_app_country] => US [patent_app_date] => 2000-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5602 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/154/06154401.pdf [firstpage_image] =>[orig_patent_app_number] => 528400 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/528400
Circuit and method for memory device with defect current isolation Mar 19, 2000 Issued
Array ( [id] => 4291333 [patent_doc_number] => 06282147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Semiconductor memory device having word lines driven by row selecting signal and column selecting signal lines arranged parallel to each other' [patent_app_type] => 1 [patent_app_number] => 9/528446 [patent_app_country] => US [patent_app_date] => 2000-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 11951 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/282/06282147.pdf [firstpage_image] =>[orig_patent_app_number] => 528446 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/528446
Semiconductor memory device having word lines driven by row selecting signal and column selecting signal lines arranged parallel to each other Mar 16, 2000 Issued
Array ( [id] => 4419319 [patent_doc_number] => 06310880 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Content addressable memory cells and systems and devices using the same' [patent_app_type] => 1 [patent_app_number] => 9/527351 [patent_app_country] => US [patent_app_date] => 2000-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 6406 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/310/06310880.pdf [firstpage_image] =>[orig_patent_app_number] => 527351 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/527351
Content addressable memory cells and systems and devices using the same Mar 16, 2000 Issued
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